STAC9752 Datasheet, PDF (86/95 Pages) Integrated Device Technology – TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
12.1. Digital I/O
These signals connect the STAC9752/9753 to its AC'97 controller counterpart, an external crystal,
multi-CODEC selection and external audio amplifier.
Pin Name
XTL_IN
XTL_OUT
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC
RESET#
N.C.
N.C.
N.C.
GPIO0
GPIO1
CID0
CID1
EAPD
SPDIF
Pin #
2
3
5
6
8
10
11
31
33
34
43
44
45
46
47
48
Table 32. Digital Connection Signals
Type
I
I/O
I
I/O
O
I
I
I
I
I/O
I/O
I/O
I
I
I/O
I/O
Description
24.576 MHz Crystal or External Clock Source
24.576 MHz Crystal
Serial, time division multiplexed, AC'97 input stream
12.288 MHz serial data clock
Serial, time division multiplexed, AC'97 output stream
48 KHz fixed rate sample sync
AC'97 Master H/W Reset
IDT Internal Test mode only.
IDT Internal Test mode only
IDT Internal Test mode only
General Purpose I/O
General Purpose I/O
Multi-CODEC ID select – bit 0
Multi-CODEC ID select – bit 1
External Amplifier Power Down/GPIO
SPDIF digital output
Pin 48: To Enable SPDIF, use an 1 KΩ - 10 KΩ external
pulldown. To Disable SPDIF, use an 1 KΩ - 1 0 KΩ external
pullup. Do NOT leave Pin 48 floating.
Note: Pins 31, 33, and 34 are NO CONNECTS.
IDT™
86
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
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