70V25L25PFI Datasheet, PDF(5/25 Page) Integrated Device Technology – True Dual-Ported memory cells which allow simultaneous reads of the same memory location

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70V25L25PFI Datasheet, PDF (5/25 Pages) Integrated Device Technology – True Dual-Ported memory cells which allow simultaneous reads of the same memory location

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IDT70V35/34S/L (IDT70V25/24S/L)

High-Speed 3.3V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM

Pin Configurations(1,2,3,4)(con't)

Industrial and Commercial Temperature Ranges

06/08/04

INDEX

11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75

I/O8L 12

74 A7L

I/O9L 13

73 A6L

I/O10L 14

I/O11L 15

I/O12L 16

I/O13L 17

VSS 18

I/O14L 19

I/O15L 20

VDD 21

VSS 22

IDT70V25/24J

J84-1(4)

84-Pin PLCC

Top View(5)

72 A5L

71 A4L

70 A3L

69 A2L

68 A1L

67 A0L

66 INTL

65 BUSYL

64 VSS

I/O0R 23

63 M/S

I/O1R 24

62 BUSYR

I/O2R 25

61 INTR

VDD 26

60 A0R

I/O3R 27

59 A1R

I/O4R 28

58 A2R

I/O5R 29

57 A3R

I/O6R 30

56 A4R

I/O7R 31

55 A5R

I/O8R 32

54 A6R

33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

5624 drw 05

NOTES:

1. A12 is a NC for IDT70V24.

2. All VDD pins must be connected to power supply.

3. All VSS pins must be connected to ground.

4. J84-1 package body is approximately 1.15 in x 1.15 in x .17 in.

5. This package code is used to reference the package diagram.

6. This text does not indicate orientation of the actual part marking.

6.542

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