70V25L25PFI Datasheet, PDF (1/25 Pages) Integrated Device Technology – True Dual-Ported memory cells which allow simultaneous reads of the same memory location

HIGH-SPEED 3.3V
8/4K x 18 DUAL-PORT
8/4K x 16 DUAL-PORT
STATIC RAM
IDT70V35/34S/L
IDT70V25/24S/L
Features
◆ _{True Dual-Ported memory cells which allow simultaneous}
reads of the same memory location
◆ _{High-speed access}
IDT70V35/34
– Commercial: 15/20/25ns (max.)
– Industrial: 20ns
IDT70V25/24
– Commercial: 15/20/25/35/55ns (max.)
– Industrial: 20/25ns
◆ _{Low-power operation}
– IDT70V35/34S
– IDT70V35/34L
Active: 430mW (typ.)
Active: 415mW (typ.)
Standby: 3.3mW (typ.)
Standby: 660µW (typ.)
– IDT70V25/24S
Active: 400mW (typ.)
Standby: 3.3mW (typ.)
– IDT70V25/24L
Active: 380mW (typ.)
Standby: 660µW (typ.)
◆ _{Separate upper-byte and lower-byte control for multiplexed}
bus compatibility
◆ _{IDT70V35/34 (IDT70V25/24) easily expands data bus width}
to 36 bits (32 bits) or more using the Master/Slave select
when cascading more than one device
◆ _{M/S = VIH for BUSY output flag on Master}
M/S = VIL for BUSY input on Slave
◆ _{BUSY and Interrupt Flag}
◆ _{On-chip port arbitration logic}
◆ _{Full on-chip hardware support of semaphore signaling}
between ports
◆ _{Fully asynchronous operation from either port}
◆ _{LVTTL-compatible, single 3.3V (±0.3V) power supply}
◆ _{Available in a 100-pin TQFP (IDT70V35/24) & (IDT70V25/24),}
86-pin PGA (IDT70V25/24) and 84-pin PLCC (IDT70V25/24)
◆ _{Industrial temperature range (-40°C to +85°C) is available}
for selected speeds
◆ _{Green parts available, see ordering information}
Functional Block Diagram
R/WL
UBL
R/WR
UBR
LBL
CEL
OEL
LBR
CER
OER
I/O9L-I/O17L⁽⁵⁾
I/O0L-I/O8L⁽⁴⁾
BUSYL^(2,3)
I/O
Control
I/O
Control
A12L⁽¹⁾
A0L
Address
Decoder
MEMORY
ARRAY
13
13
CEL
OEL
R/WL
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
SEML
INTL⁽³⁾
M/S
NOTES:
1. A12 is a NC for IDT70V34 and for IDT70V24.
2. (MASTER): BUSY is output; (SLAVE): BUSY is input.
3. BUSY outputs and INT outputs are non-tri-stated push-pull.
4. I/O0x - I/O7x for IDT70V25/24.
5. I/O8x - I/O15x for IDT70V25/24.
1
©2008 Integrated Device Technology, Inc.
Address
Decoder
CER
OER
R/WR
,
I/O9R-I/O17R⁽⁵⁾
I/O0R-I/O8R⁽⁴⁾
BUSYR^(2,3)
A12R⁽¹⁾
A0R
SEMR
INTR⁽³⁾
5624 drw 01
OCTOBER 2008
DSC-5624/7