90E32 Datasheet, PDF (38/71 Pages) Integrated Device Technology – Poly-Phase High-Performance Wide-Span Energy Metering IC

90E32
POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
SysStatus0
System Status 0
Address: 01H
Type: Read/Clear
Default Value: 0000H
Bit
Name
Description
15
-
Reserved. ^*
This bit indicates CS0 (3BH) checksum status.
14
CS0Err 0: CS0 checksum correct (default)
1: CS0 checksum error. The WarnOut pin is asserted at the same time.
13
-
Reserved.
This bit indicates CS1 (4DH) checksum status.
12
CS1Err 0: CS1 checksum correct (default)
1: CS1 checksum error. The WarnOut pin is asserted at the same time.
11
-
Reserved.
This bit indicates CS2 (57H) checksum status.
10
CS2Err 0: CS2 checksum correct (default)
1: CS2 checksum error. The WarnOut pin is asserted at the same time.
9
-
Reserved.
This bit indicates CS3 (6FH) checksum status.
8
CS3Err 0: CS3 checksum correct (default)
1: CS3 checksum error. The WarnOut pin is asserted at the same time.
This bit indicates whether there is any error with the voltage phase sequence.
7
URevWn 0: No error with the voltage phase sequence (default)
1: Error with the voltage phase sequence.
This bit indicates whether there is any error with the current phase sequence.
6
IRevWn 0: No error with the current phase sequence (default)
1: Error with the current phase sequence.
5-4
-
Reserved.
This bit indicates whether there is any voltage sag (voltage lower than threshold) in one phase or more.
3
SagWarn 0: No voltage sag (default)
1: Voltage sag.
This bit indicates whether there is any voltage phase losing in one phase or more.
2
PhaseLoseWn 0: No voltage phase losing (default)
1: Voltage phase losing.
1-0
-
Reserved.
Note: All reserved bits of any register should be ignored when reading and should be written with zero.
Register
38
December 9, 2011