90E32 Datasheet, PDF (10/71 Pages) Integrated Device Technology – Poly-Phase High-Performance Wide-Span Energy Metering IC

90E32
2
PIN DESCRIPTION
Table-1 Pin Description
Name
Pin No.
I/O
Reset
41
I
AVDD
1
I
DVDD
48
I
VDD18
DGND
AGND
I1P
I1N
42, 43
P
19, 44, 47
I
2, 12
I
3
4
I
I2P
I2N
5
6
I
I3P
I3N
7
8
I
Vref
V1P
V1N
V2P
V2N
V3P
V3N
OSCI
OSCO
ZX0
ZX1
ZX2
CF1
CF2
11
O
13
14
I
15
16
I
17
18
I
20
I
21
O
22
23
O
24
25
O
26
O
POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Type
LVTTL
Power
Power
Power
Power
Power
Analog
Analog
Analog
Analog
Analog
Analog
Analog
OSC
OSC
LVTTL
LVTTL
LVTTL
Description
Reset: Reset Pin (active low)
This pin should connect to ground through a 0.1 µF filter capacitor and a 10kΩ resistor to
VDD. In application it can also directly connect to one output pin from microcontroller (MCU).
AVDD: Analog Power Supply
This pin provides power supply to the analog part. This pin should connect to DVDD and be
decoupled with a 0.1µF capacitor.
DVDD: Digital Power Supply
This pin provides power supply to the digital part. It should be decoupled with a 10µF capac-
itor and a 0.1µF capacitor.
VDD18: Digital Power Supply (1.8 V)
These two pins should be connected together and connected to ground through a 10µF
capacitor.
DGND: Digital Ground
AGND: Analog Ground
I1P: Positive Input for Phase A Current
I1N: Negative Input for Phase A Current
These pins are differential inputs for phase A current.
Note: I1 to phase A and I3 to phase C mapping can be swapped by configuring the I1I3Swap
bit (b13, MMode0).
I2P: Positive Input for Phase B Current
I2N: Negative Input for Phase B Current
These pins are differential inputs for phase B current.
I3P: Positive Input for Phase C Current
I3N: Negative Input for Phase C Current
These pins are differential inputs for phase C current.
Note: I1 to phase A and I3 to phase C mapping can be swapped by configuring the I1I3Swap
bit (b13, MMode0).
Vref: Output Pin for Reference Voltage
This pin should be decoupled with a 10µF capacitor, possibly a 0.1µF ceramic capacitor and
a 1nF ceramic capacitor.
V1P: Positive Input for Phase A Voltage
V1N: Negative Input for Phase A Voltage
These pins are differential inputs for phase A voltage.
V2P: Positive Input for Phase B Voltage
V2N: Negative Input for Phase B Voltage
These pins are differential inputs for phase B voltage.
V3P: Positive Input for Phase C Voltage
V3N: Negative Input for Phase C Voltage
These pins are differential inputs for phase C voltage.
OSCI: External Crystal Input
OSCO: External Crystal Output
A 16.384 MHz crystal is connected between OSCI and OSCO. There are two on-chip capac-
itor, therefore no need of external capacitors.
ZX2/ZX1/ZX0:Zero-Crossing Output
These pins are asserted when voltage or current crosses zero. Zero-crossing mode can be
configured by the ZXConfig register (07H).
CF1: (all-phase-sum total) Active Energy Pulse Output
CF2: (all-phase-sum total) Reactive/ Apparent Energy Pulse Output
The output of this pin is determined by the CF2varh bit (b7, MMode0) and the CF2ESV bit
(b8, MMode0).
Pin Description
10
December 9, 2011