90E32 Datasheet, PDF (11/71 Pages) Integrated Device Technology – Poly-Phase High-Performance Wide-Span Energy Metering IC

90E32
Table-1 Pin Description (Continued)
Name
CF3
CF4
Pin No.
I/O
27
O
28
O
WarnOut
29
O
IRQ0
30
O
IRQ1
PM0
PM1
CS
SCLK
SDO
SDI
TEST
IC
NC
31
O
33
34
I
37
I
38
I
39
O
40
I
32
I
9, 10, 36
35, 45, 46
POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Type
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
Description
CF3: (all-phase-sum total) Active Fundamental Energy Pulse Output
CF4: (all-phase-sum total) Active Harmonic Energy Pulse Output
WarnOut: Fatal Error Warning
This pin is asserted high when there is metering related parameter checksum error. Other-
wise this pin stays low. Refer to 6.2.2 IRQ and WarnOut Signal Generation.
IRQ0: Interrupt Output 0
This pin is asserted when one or more events in the SysStatus0 register (01H) occur. It is
deasserted when there is no bit set in the SysStatus0 register (01H).
In Detection mode, the IRQ0 is used to indicate the output of current detector. The IRQ0
state is cleared when entering or exiting Detection mode.
IRQ1: Interrupt Output 1
This pin is asserted when one or more events in the SysStatus1 register (02H) occur. It is
deasserted when there is no bit set in the SysStatus1 register (02H).
In Detection mode, the IRQ1 is used to indicate the output of current detector. The IRQ1
state is cleared when entering or exiting Detection mode.
PM1/0: Power Mode Configuration
These two pins define the power mode of 90E32. Refer to Table-2.
CS: Chip Select (Active Low)
In SPI mode, this pin must be driven from high to low for each read/ write operation, and
maintain low for the entire operation.
SCLK: Serial Clock
This pin is used as the clock for the SPI interface. Refer to 4 SPI Interface.
SDO: Serial Data Output
This pin is used as the data output for the SPI mode. Refer to 4 SPI Interface.
SDI: Serial Data Input
This pin is used as the data input for the SPI mode. Refer to 4 SPI Interface.
This pin should be always connected to DGND in system application.
These pins should be always connected to DGND in system application.
NC: These pins should be left open.
Pin Description
11
December 9, 2011