ICS9FG1200D-1 Datasheet, PDF (21/23 Pages) Integrated Device Technology – Frequency Gearing Clock for CPU, PCIe Gen1, Gen2

ICS9FG1200D-1
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
N
INDEX
AREA
12
D
c
L
E1 E
h x 45°
α
A
A1
-C-
e
b
SEATING
PLANE
.10 (.004) C
SYMBOL
A
A1
b
c
D
E
E1
e
h
L
N
a
56-Lead, 300 mil Body, 25 mil, SSOP
In Millimeters
COMMON DIMENSIONS
MIN
MAX
2.41
2.80
0.20
0.40
0.20
0.34
0.13
0.25
SEE VARIATIONS
10.03
10.68
7.40
7.60
0.635 BASIC
0.38
0.64
0.50
1.02
SEE VARIATIONS
0°
8°
In Inches
COMMON DIMENSIONS
MIN
MAX
.095
.110
.008
.016
.008
.0135
.005
.010
SEE VARIATIONS
.395
.420
.291
.299
0.025 BASIC
.015
.025
.020
.040
SEE VARIATIONS
0°
8°
VARIATIONS
N
56
D mm.
MIN
MAX
18.31
18.55
D (inch)
MIN
MAX
.720
.730
Reference Doc.: JEDEC Publication 95, MO-118
10-0034
IDT^® Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD
21
1138C 02/08/10