932SQL450 Datasheet, PDF (17/23 Pages) Integrated Device Technology – Integrated 85 ohm differential terminations

932SQL450 DATASHEET
Electrical Characteristics–REF14M
T_A = 0 - 70°C; Supply Voltage V_DD/V_DDA = 3.3 V +/-5%,
PARAMETER
SYMBOL
CONDITIONS
Output Impedance
R_DSP
V_O = V_DD*(0.5)
Output High Voltage
V_OH
I_OH = -1 mA
Output Low Voltage
V_OL
I_OL = 1 mA
Clock High Time
T_HIGH
1.5V
MIN
12
2.4
27.5
Clock Low Time
T_LOW
1.5V
Edge Rate
t_slewr/f
Rising/Falling edge rate
Duty Cycle
d_t1
V_T = 1.5 V
Jitter, Cycle to cycle
t_jcyc-cyc
V_T = 1.5 V
See "Power Supply and Test Loads" page for termination circuits
1_{Guaranteed by design and characterization, not 100% tested in production.}
2 _{Measured between 0.8V and 2.0V}
27.5
1
45
TYP
21.7
1.9
50.1
42
MAX
55
0.55
4
55
1000
UNITS
Ω
V
V
ns
Notes
1
1
ns
1
V/ns
1,2
%
1
ps
1
Test Clarification Table
Comments
Power-up w/ TEST_SEL = 1 (>0.7V) to enter test
mode. Cycle power to disable test mode.
If TEST_SEL HW pin is 0 during power-up,
test mode can be selected through B6b6.
If test mode is selected by B6b6, then B6b7
is used to select HI-Z or REF/N
FS_B/TEST_Mode pin is not used.
Cycle power to disable test mode.
HW
SW
TEST_MOD _TEST
TEST_SEL
E
ENTRY BIT
HW PIN HW PIN
B6b6
0
X
0
1
0
X
1
0
X
1
1
X
1
1
X
0
X
1
REF/N or
HI-Z
B6b7
X
0
1
0
1
0
OUTPUT
NORMAL
HI-Z
REF/N
REF/N
REF/N
HI-Z
0
X
1
1
REF/N
B6b6: 1= ENTER TEST MODE, Default = 0 (NORMAL OPERATION)
B6b7: 1= REF/N, Default = 0 (HI-Z)
REVISION B 03/06/15
17
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