932SQL450 Datasheet, PDF (14/23 Pages) Integrated Device Technology – Integrated 85 ohm differential terminations

932SQL450 DATASHEET
Electrical Characteristics–Input/Supply/Common Parameters
TA = T_COM; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
Ambient Operating
Temperature
T_COM
Commmercial range
0
Input High Voltage
Input Low Voltage
Low Threshold Input-
High Voltage
Low Threshold Input-
Low Voltage
V_IH
V_IL
V_{IH_FS}
V_{IL_FS}
Single-ended inputs, except
SMBus, low threshold and tri-level
2
inputs
Single-ended inputs, except
SMBus, low threshold and tri-level GND - 0.3
inputs
3.3 V +/-5%
0.7
3.3 V +/-5%
V_SS - 0.3
TYP
MAX
70
UNITS NOTES
°C
V_DD + 0.3 V
0.8
V
V_DD + 0.3 V
0.35
V
Single-ended inputs,
I_IN
V_IN = GND, V_IN = VDD
-5
5
uA
Input Current
Single-ended inputs.
V_IN = 0 V; Inputs with internal pull-
I_INP
up resistors
-200
V_IN = VDD; Inputs with internal pull-
down resistors
200
uA
Input Frequency
Pin Inductance
Capacitance
F_i
L_pin
C_IN
C_OUT
Logic Inputs
Output pin capacitance
C_INX
X1 & X2 pins
Clk Stabilization
T_STAB
From V_DD Power-Up and after input
clock stabilization or de-assertion of
PD# to 1st clock
SS Modulation Frequency f_MODIN
Allowable Frequency
(Triangular Modulation)
30
Tdrive_PD#
t_DRVPD
Differential output enable after
PD# de-assertion
Tfall
Trise
SMBus Input Low
Voltage
t_F
t_R
V_ILSMB
Fall time of control inputs
Rise time of control inputs
SMBus Input
High Voltage
V_IHSMB
2.1
SMBus Output
Low Voltage
V_OLSMB
@ I_PULLUP
SMBus Sink Current
I_PULLUP
@ V_OL
4
Nominal Bus Voltage
V_DDSMB
3V to 5V +/- 10%
2.7
25.00
MHz
2
7
nH
1
5
pF
1
5
pF
1
5
pF
1
0.4
1.8
ms
1,2
31.5
33
kHz
1
98
300
us
1,3
5
ns
1,2
5
ns
1,2
0.8
V
V_DDSMB
V
0.4
V
mA
5.5
V
SCLK/SDATA Rise Time t_RSMB (Max VIL - 0.15) to (Min VIH + 0.15)
1000
ns
1
SCLK/SDATA Fall Time
t_FSMB (Min VIH + 0.15) to (Max VIL - 0.15)
SMBus Operating
Frequency
f_MAXSMB
Maximum SMBus operating
frequency
1_{Guaranteed by design and characterization, not 100% tested in production.}
2_{Control input must be monotonic from 20% to 80% of input swing.}
3_{Time from deassertion until outputs are >200 mV}
LOW-POWER CK420BQ DERIVATIVE FOR PCIE COMMON CLOCK ARCHITECTURES
300
ns
1
100
kHz
14
REVISION B 03/06/15