ICS842S104 Datasheet, PDF (10/21 Pages) Integrated Device Technology – Crystal-to-HSTL 100MHz / 200MHz PCI Express™ Clock Synthesizer

ICS842S104 Data Sheet
Parameter Measurement Information
3.3V±5%
1.5V to 2.0V
3.3V±5%
V_DD
V_DDO
V_DDA
HSTL
GND
SCOPE
Qx
nQx
0V
3.3V HSTL Output Load AC Test Circuit
CRYSTAL-TO- HSTL 100MHZ / 200MHZ PCI EXPRESS™ CLOCK SYNTHESIZER
Phase Noise Plot
Phase Noise Mask
f₁ ^{Offset Frequency} f₂
RMS Jitter = Area Under the Masked Phase Noise Plot
RMS Phase Jitter
SRCC(1:4)
SRCT(1:4)
tcycle n
➤
tcycle n+1
➤
| | ^{tjit(cc) =} tcycle n – tcycle n+1
1000 Cycles
Cycle-to-Cycle Jitter
SRCC(1:4)
SRCT(1:4)
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Output Duty Cycle/Pulse Width/Period
ICS842S104CG REVISION A MARCH 17, 2010
10
©2010 Integrated Device Technology, Inc.