ICS952623 Datasheet, PDF (6/27 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4 processor

Integrated
Circuit
Systems, Inc.
ICS952623
Advance Information
Electrical Characteristics - CPU & SRC 0.7V Current Mode Differential Pair
T_A = 0 - 70°C; V_DD = 3.3 V +/-5%; C_L =2pF
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS NOTES
Current Source Output
Impedance
Zo¹
V_O = V_x
3000
Ω
1
Voltage High
Voltage Low
VHigh
VLow
Statistical measurement on
660
single ended signal using
oscilloscope math function.
-150
850
1
mV
150
1
Max Voltage
Min Voltage
Vovs
Vuds
Measurement on single ended
signal using absolute value.
-300
1150
mV
1
1
Crossing Voltage (abs) Vcross(abs)
250
550
mV
1
Crossing Voltage (var)
Long Accuracy
d-Vcross
ppm
Variation of crossing over all
edges
see Tperiod min-max values
200MHz nominal
-300
4.9985
140
mV
1
300
ppm
1,2
5.0015 ns
2
Average period
Tperiod
200MHz spread
166.66MHz nominal
166.66MHz spread
133.33MHz nominal
133.33MHz spread
4.9985
5.9982
5.9982
7.4978
7.4978
5.0266 ns
2
6.0018 ns
2
6.0320 ns
2
7.5023 ns
2
5.4000 ns
2
100.00MHz nominal
9.9970
10.0030 ns
2
Absolute min period
T_absmin
100.00MHz spread
200MHz nominal
166.66MHz nominal/spread
133.33MHz nominal/spread
9.9970
4.8735
5.8732
7.3728
10.0533 ns
2
ns
1,2
ns
1,2
ns
1,2
100.00MHz nominal/spread 9.8720
ns
1,2
Rise Time
Fall Time
Rise Time Variation
Fall Time Variation
Duty Cycle
t_r
V_OL = 0.175V, V_OH = 0.525V
175
t_f
V_OH = 0.525V V_OL = 0.175V
175
d-t_r
d-t_f
d_t3
Measurement from differential
45
wavefrom
700
ps
1
700
ps
1
125
ps
1
125
ps
1
55
%
1
Skew
Jitter, Cycle to cycle
t_sk3
t_jcyc-cyc
V_T = 50%
Measurement from differential
wavefrom
100
ps
1
125
ps
1
1_{Guaranteed by design, not 100% tested in production.}
2 _{All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that Ref output is at}
14.31818MHz
SRC clock outputs run at only 100MHz or 200MHz, specs for 133.33 and 166.66 do not apply to SRC clock pair.
0758—02/08/05
6