ICS952623 Datasheet, PDF (15/27 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4 processor

Integrated
Circuit
Systems, Inc.
ICS952623
Advance Information
I²C Table: VCO Frequency Control Register
Byte 12
Pin #
Name
Control Function
Type
0
Bit 7
-
Bit 6
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Bit 0
-
N Div7
The decimal
RW
-
N Div6
N Div5
representation of N
Div (8:0) is equal to
RW
RW
-
-
N Div4
VCO divider value.
RW
-
N Div3
Default at power up =
RW
-
N Div2
latch-in or Byte 0 Rom ^RW
-
N Div1
table.
RW
-
N Div0
RW
-
I²C Table: Spread Spectrum Control Register
Byte 13
Pin #
Name
Control Function
Type
0
Bit 7
-
SSP7
These Spread
RW
-
Bit 6
-
SSP6
Spectrum bits will
RW
-
Bit 5
-
SSP5
program the spread
RW
-
Bit 4
-
SSP4
pecentage. It is
RW
-
Bit 3
-
SSP3
recommended to use RW
-
Bit 2
-
SSP2
ICS Spread % table
RW
-
Bit 1
-
SSP1
for spread
RW
-
Bit 0
-
SSP0
programming.
RW
-
I²C Table: Spread Spectrum Control Register
Byte 14
Pin #
Name
Control Function
Type
0
Bit 7
-
Reserved
Reserved
RW
-
Bit 6
-
Reserved
Reserved
RW
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
SSP13
RW
-
SSP12
It is recommended to RW
-
SSP11
use ICS Spread %
RW
-
SSP10
table for spread
RW
-
SSP9
programming.
RW
-
Bit 0
-
SSP8
RW
-
1
PWD
-
X
-
X
-
X
-
X
-
X
-
X
-
X
-
X
1
PWD
-
X
-
X
-
X
-
X
-
X
-
X
-
X
-
X
1
PWD
-
0
-
0
-
X
-
X
-
X
-
X
-
X
-
X
0758—02/08/05
15