ICS952623 Datasheet, PDF (2/27 Pages) Integrated Circuit Systems – Programmable Timing Control Hub for Next Gen P4 processor

Integrated
Circuit
Systems, Inc.
ICS952623
Advance Information
Pin Description
PIN
#
PIN NAME
1 REF0
2 REF1
3 VDDREF
4 X1
5 X2
6 GND
7 PCICLK_F0
8 PCICLK_F1
9 PCICLK_F2
10 VDDPCI
11 GND
12 PCICLK0
13 PCICLK1
14 PCICLK2
15 PCICLK3
16 VDDPCI
17 GND
18 PCICLK4
19 PCICLK5
20 PCICLK6
21 PD#
22 3V66_0
23 3V66_1
24 VDD3V66
25 GND
26 3V66_2
27 3V66_3
28 SCLK
PIN TYPE
DESCRIPTION
OUT
OUT
PWR
IN
OUT
PWR
OUT
OUT
OUT
PWR
PWR
OUT
OUT
OUT
OUT
PWR
PWR
OUT
OUT
OUT
14.318 MHz reference clock.
14.318 MHz reference clock.
Ref, XTAL power supply, nominal 3.3V
Crystal input, Nominally 14.318MHz.
Crystal output, Nominally 14.318MHz
Ground pin.
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Free running PCI clock not affected by PCI_STOP# .
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
PCI clock output.
PCI clock output.
Power supply for PCI clocks, nominal 3.3V
Ground pin.
PCI clock output.
PCI clock output.
PCI clock output.
Asynchronous active low input pin used to power down the device
IN
into a low power state. The internal clocks are disabled and the
VCO and the crystal are stopped. The latency of the power down
will not be greater than 1.8ms. Internal pull-up of 150K nominal.
OUT
OUT
PWR
PWR
OUT
OUT
IN
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Power pin for the 3V66 clocks.
Ground pin.
3.3V 66.66MHz clock output
3.3V 66.66MHz clock output
Clock pin of I2C circuitry 5V tolerant
0758—02/08/05
2