IC-TW2 Datasheet, PDF (9/30 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC WITH INTEGRATED EEPROM

iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
PROGRAMMING
Rev D3, Page 9/30
Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 11
GC:
Coarse gain control (P. 11)
GFA/B:
Fine gain control on channel A/B (P. 11)
OFSA/B: Offset control on channel A/B (P. 11)
Output Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Page 12
MODE:
Output mode selection (P. 12)
DIR:
Count direction (P. 12)
INTER:
Interpolation rate selection (P. 12)
IPOS:
Index pulse position (P. 13)
IWIDTH: Index pulse width selection (P. 13)
Index Gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 15
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 17
CALIB1: Calibration mode 1 select (P. 17)
CALIB2: Calibration mode 2 select (P. 17)
OFSZ:
Index comparator offset control (P. 17)
CLOCK: Oscillator tune (P. 17)
Configuration Dependencies . . . . . . . . . . . . . . Page 19
FREQ:
Maximum input frequency (P. 20)
CLKDIV: Master clock divider (P. 20)
HYST:
Hysteresis control (P. 20)
FILTER:
Datapath filter control (P. 20)
Device Identification . . . . . . . . . . . . . . . . . . . . . . . Page 20
IDA:
Major Device Revision (P. 20)
IDB:
Minor Device Revision (P. 20)
Start Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 21
STARTUP: Startup sequence selection (P. 21)
RESET:
Restart interpolation engine (P. 21)
1W- / 2-W-Interface And EEPROM Access . Page 22
EE_WRITE: EEPROM store command (P. 26)
Test Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Page 27
GRANULAR:
A/B output edge granularity control
(P. 27)
VC:
Reference voltage fine tuning (P. 27)
CLKMODE: Clock source selection (P. 27)
CLKDLY: Clock distribution delay line selection
(P. 27)
EN_MON: Position data monitor control (P. 27)
MONITOR: Monitor register (P. 27)
EE_READ: EEPROM read command (P. 27)