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IC-TW2 Datasheet, PDF (20/30 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC WITH INTEGRATED EEPROM | |||
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iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
FREQ(6:0)
Code
0x00
Addr. 0x05; bit 6:0
Function, defaults to eeprom setting
f core = f system
...
0x7F
f core
=
f system
1 + FREQ(6
:
0)
f core
=
f system
128
Rev D3, Page 20/30
R/W Hysteresis is dependent upon chosen accuracy. The
Table below is valid for high accuracy operation.
HYST(1:0)
Addr. 0x06; bit 1:0
R/W
Code
Function, defaults to eeprom setting
00
no hysteresis
01
±1.4 °
10
±2.81 °
11
±5.63 °
Table 25: Master clock divider
Table 23: Maximum input frequency selection
Interpolation setting (register 0x02) in conjunction with
the frequency divider (register 0x05) deï¬nes the iC-
TW2âs accuracy mode. Table 21 explains the corre-
lation. Based on the selected accuracy mode other
system parameters are deï¬ned as shown in Table 22.
It is recommended to use the divider at all times when
support for high input frequencies is not required.
CLKDIV
Code
0
1
Addr. 0x0B; bit 1
Function, defaults to eeprom setting
fsystem = fosc
fsystem
=
f osc
2
R/W
Table 24: Master clock divider
An averaging ï¬lter can be enabled to remove loop in-
stability noise. It is recommended to enable the ï¬l-
ter in almost all cases. Enabling the ï¬lter increases
SIN/COS input to A/B output latency. See Table 22 on
page 19 for details.
FILTER(1:0)
Addr. 0x06; bit 3:2
R/W
Code
Function, defaults to eeprom setting
00
ï¬lter disabled
01
Average of 8 samples
10
Average of 16 samples
11
undeï¬ned
Table 26: Datapath ï¬lter control
DEVICE IDENTIFICATION
IDA(3:0)
Code
Addr. 0x00; bit 7:4
R/W
Function, Major device identiï¬cation
Mask Programmed Value Identiï¬es Major Revision
Table 27: Major device revision
IDB(3:0)
Code
Addr. 0x00; bit 3:0
R/W
Function, Minor device identiï¬cation
Mask Programmed Value Identiï¬es Minor Revision
Table 28: Minor device revision
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