IC-TW2 Datasheet, PDF (3/30 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC WITH INTEGRATED EEPROM

iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
PACKAGES
Rev D3, Page 3/30
PIN CONFIGURATION QFN24 4 mm x 4 mm
PIN FUNCTIONS
No. Name Function
1 VDD +3 V to +5.5 V Digital Supply Voltage
2 B_V B Signal / V Signal Output
3 NB_NV Inverted B / Inverted V Signal Output
4 A_U A Signal / U Signal Output
5 NA_NU Inverted A / Inverted U Signal Output
6 GND Digital Ground
7 NZ_NW Inverted Z / Inverted W Signal Output
8 Z_W Z Signal / W Signal Output
9 1W
1W-Interface, signal input
10 VDDA +3 V to +5.5 V Analog Supply Voltage
11 GNDA Analog Ground
12 n.c.
Pin not connected
13 PINB Signal Input B+
14 NINB Signal Input B-
15 CLKSEL System Clock Selection Input
16 NRST External Reset Input (active low)
17 NINA Signal Input A-
18 PINA Signal Input A+
19 VC
1.2 V Reference Voltage Output
20 NINZ Signal Input Z- (Index)
21 PINZ Signal Input Z+ (Index)
22 SCLK 2-Wire Interface, clock input
23 CLKEXT External Clock Input
24 SDAT 2-Wire Interface, serial data in/out
TP
Thermal Pad (bottom side)
The Thermal Pad of the QFN package (bottom side) is to be connected to a ground plane on the PCB which
must have GND potential. GNDA must be wired to GND.
Only pin 1 marking on top or bottom defines the package orientation (iC-TW2 label and coding is subject
to change).