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IC-TW2 Datasheet, PDF (19/30 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC WITH INTEGRATED EEPROM
iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
CONFIGURATION DEPENDENCIES
Rev D3, Page 19/30
The following paragraph describes dependencies be-
tween several chip configuration settings and system
performance. It is vital to understand the implication of
system parameters to be able to tune the iC-TW2 for
full performance. It is especially important to correctly
program register FREQ(6:0), since this directly affects
accuracy and maximum allowed input frequency.
Selecting configuration parameters
Follow the outlined procedure below to select the
proper configuration. Refer to Table 22 for reference.
1. Determine the maximum input frequency finput as re-
quired by the application.
2. Calculate fcore based on finput and interpolation rate
INTER(7:0).
3. Select fsystem based on the accuracy requirement.
See Table 21. Accuracy is a function of interpolation
and frequency (registers INTER(7:0) and FREQ(6:0)).
Always use the highest accuracy possible to still satisfy
finput.
4. Determine fosc. Selecting the slowest fosc possible
lowers power consumption and improves jitter perfor-
mance.
Clock tuning
1. Observe fosc/32 on pin A_U during calibra-
tion mode 2.
2. Use CLOCK(4:0) to tune the oscillator to the desired
fcal frequency. (fpinA = fosc/32)
3. Be aware that the oscillator can have as much
as 20 % frequency variation over the operating tem-
perature range (-40 °C to 125 °C). The oscillator runs
slower at higher temperatures. To guarantee perfor-
mance at 125 °C it is necessary to tune the oscillator
to typ. 12 % higher frequency at room temperature of
25 °C.
INTER(7:0)
129 to 256; 0
65 to 128
1 to 64
FREQ(6:0)
0 to 127
0
1 to 127
0
1
2 to 127
Accuracy Mode
High accuracy
Medium accuracy
High accuracy
Low accuracy
Medium accuracy
High accuracy
Theoretical Absolute Accuracy
±2.8°
±5.6°
±2.8 °
±11.2°
±5.6°
±2.8°
Table 21: Accuracy modes
Description
Oscillator frequency
System Clock
Core Clock
Max front-end input
frequency
Parameter / Condition
fosc [Hz]
fsystem [Hz]
fcore [Hz]
ffront [Hz]
Requirement or relationship
<30 MHz, when VDD = 5 V
<25 MHz, when VDD = 3.3 V
fsystem = fosc, if CLKDIV = 0
fsystem = fosc/2, if CLKDIV = 1
fcore = fsystem / (1 + FREQ(6:0))
ffront = fsystem / 256, if High Accuracy
ffront = fsystem / 128, if Medium Accuracy
ffront = fsystem / 64, if Low Accuracy
Max back-end frequency
Max iC-TW2 input
frequency
Min A/B edge separation
A/B edge granularity
Hysteresis
fback [Hz]
finput [Hz]
tedge
tgran
SIN/COS to A/B output
latency
tlatency [µs]
fback = fcore / INTER(7:0)
finput = min(ffront, fback)
tedge = 1 / fcore
tgran = 1 / fsystem
±(HYST(1:0) x 1.4 °), if High Accuracy
±(HYST(1:0) x 2.8 °) if Medium or Low Accuracy
10 / fsystem [MHz] + 0.2, if no filter
18 / fsystem [MHz] + 0.2, if 8 sample average
26 / fsystem [MHz] + 0.2, if 16 sample average
Table 22: Configuration dependencies
Control bit
CLOCK(4:0)
CLKDIV
FREQ(6:0)
FREQ(6:0)
INTER(7:0)
INTER(7:0)
HYST(1:0)
FILTER(1:0)