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IC-TW2 Datasheet, PDF (11/30 Pages) IC-Haus GmbH – 8-BIT SIN/COS INTERPOLATION IC WITH INTEGRATED EEPROM
iC-TW2 8-BIT SIN/COS INTERPOLATION IC
WITH INTEGRATED EEPROM
INPUT STAGE
Rev D3, Page 11/30
A programmable gain amplifier (PGA) with output re-
ferred offset adjustment is used as input stage, shown
in Figure 3. The coarse gain is common for both
channel A and B and is programmed through regis-
ter GC(2:0). Table 5 shows the required gain setting
for a given input signal amplitude (peak to peak, differ-
ential). Fine tuning gain is applied individually to chan-
nel A and B by programming registers GFA(1:0) and
GFB(1:0) respectively.
GC(2:0)
Addr. 0x07; bit 2:0
R/W
Code
Function, defaults to eeprom setting
000
1.5 V - 800 mV
001
800 mV - 400 mV
010
400 mV - 200 mV
011
200 mV - 100 mV
100
100 mV - 50 mV
101
50 mV - 25 mV
110
25 mV - 10 mV
111
not defined
Table 5: Coarse gain control of channel A/B
GFA(1:0)
Addr. 0x07; bit 4:3
R/W
GFB(1:0)
Addr. 0x07; bit 6:5
R/W
Code
Function, defaults to eeprom setting
00
0 dB
01
0.7 dB
10
1.4 dB
11
2.1 dB
Table 6: Fine gain control of channel A/B
Offset adjustment is provided at the output of the input
amplifier. It is individually programmed through regis-
ter OFSA(5:0) and OFSB(5:0). Adjustment is made in
steps of 13 mV and the corresponding register values
are sign magnitude encoded. Input referred offset be-
comes gain dependent and is defined as follows:
OFSA(5:0)
Addr. 0x08; bit 5:0
R/W
OFSB(5:0)
Addr. 0x09; bit 5:0
R/W
Code
Function, defaults to eeprom setting
111111
maximum negative adjust: -403 mV
111110
-390 mV
100001
-13 mV
100000
no correction
000000
no correction
000001
13 mV
011110
390 mV
011111
maximum positive adjust: 403 mV
Table 7: Offset control of channel A/B
Consider Table 8 regarding the relationship between
input signal peak-peak differential amplitude, amplifier
gain setting and resulting offset correction range.
Input amplifier gain and offset
Input signal range
Register
GC(2:0)
Input
referred
offset step
size
800 mV - 1.5 V
0
26 mV
400 mV - 800 mV
1
13 mV
200 mV - 400 mV
2
6.5 mV
100 mV - 200 mV
3
3.25 mV
50 mV - 100 mV
4
1.63 mV
25 mV - 50 mV
5
0.81 mV
10 mV - 25 mV
6
0.41 mV
Input
referred
offset
range
±806 mV
±403 mV
±202 mV
±101 mV
±50 mV
±25 mV
±12.6 mV
Table 8: Input amplifier gain and offset
PINB
NINB
PINA
NINA
Input
amplifier
+ GFB(1:0)
-
GC(2:0)
+
- GFA(1:0)
OFSB(5:0)
+
Xb
to interpolation
engine
+
Xa
OFSA(5:0)
13 mV ∗ OFSA(5 : 0)
OFSAinput_referred =
GC(2 : 0)
Figure 3: Input stage