IC-MH_17 Datasheet, PDF (6/26 Pages) IC-Haus GmbH – 12-BIT ANGULAR HALL ENCODER

iC-MH
12-BIT ANGULAR HALL ENCODER
Rev C2, Page 6/26
ELECTRICAL CHARACTERISTICS
Operating conditions:
VPA, VPD = 5 V ±10 %, Tj = - 40 ... 125 °C, IBM adjusted to 200 µA , 4 mm NdFeB magnet, unless otherwise stated
Item Symbol Parameter
No.
Conditions
Min. Typ.
Clock Generation
501 f()sys
System Clock
Bias Current adjusted
0.85 1.0
502 f()sdc
Sinus/Digital-Converter Clock Bias Current adjusted
13.5 16
Sin/Digital Converter
601 RESsdc Sinus/Digital-Converter Resolu-
12
tion
602 AAabs Absolute Angular Accuracy
Vpp() = 4 V, adjusted
-0.35
603 AArel
Relative Angular Accuracy
with reference to one output period at A, B, at -15 ± 10
Resolution 1024, see Fig. 17
604 f()ab
Output frequency at A, B
CFGMTB = ’0’
0.5
CFGMTB = ’1’
2.0
605 REScom Resolution of Commutation Con-
verter
1.875
606 AAabs Absolute Angular Accuracy of
-0.5
Commutation Converter
BiSS Interface, Digital Outputs MA, SLO, Digital Input SLI
701 Vs(SLO)hi Saturation Voltage High
V(SLO) = V(VPD) − V(),
I(SLO) = 4 mA
702 Vs(SLO)lo Saturation Voltage Low
I(SLO) = 4 mA to VND
703 Isc(SLO)hi Short-Circuit Current High
V(SLO) = V(VND), 25°C
-90 -50
704 Isc(SLO)lo Short-Circuit Current Low
V(SLO) = V(VPD), 25°C
50
705 tr(SLO) Rise Time SLO
CL = 50 pF
706 tf(SLO) Fall Time SLO
CL = 50 pF
707 Vt()hi
Threshold Voltage High: MA, SLI
708 Vt()lo
Threshold Voltage Low: MA, SLI
0.8
709 Vt()hys Threshold Hysteresis: MA, SLI
140 250
710 Ipd(SLI) Pull-Up Current: MA, SLI
V() = 0...VPD − 1 V
6
30
711 Ipu(MA) Pull-Up Current 30 µA MA
-60 -30
712 f()MA
Permissible Frequency at MA
Zapping and Test
801 Vt()hi
Threshold Voltage High VZAP, with reference to VND
PTE
802 Vt()lo
Threshold Voltage Low VZAP, with reference to VND
0.8
PTE
803 Vt()hys Hysteresis
Vt()hys = Vt()hi − Vt()lo
140 250
804 Vt()nozap Threshold Voltage Nozap VZAP V() = V(VZAP) − V(VPD), V(VPD) = 5 V ±5 %, 0.7
at chip temperature 27 °C
805 Vt()zap
Threshold Voltage Zap VZAP
V() = V(VZAP) − V(VPD), V(VPD) = 5 V ±5 %,
at chip temperature 27 °C
806 V()zap Zapping Voltage
PROG = ’1’
6.9 7.0
807 V()zpd Diode Voltage, zapped
808 V()uzpd Diode Voltage, unzapped
3
809 Rpd()VZAP Pull-Down Resistor at VZAP
30
810 Ipd(PTE) Pull-Down Current PTE
V() = 0...VPD − 1 V
-60 -30
NERR Output
901 Vt()hi
Input Threshold Voltage High with reference to VND
902 Vs()lo
Saturation Voltage Low
I() = 4 mA , with reference to VND
903 Vt()lo
Input Threshold Voltage Low
with reference to VND
0.8
904 Vt()hys Input Hysteresis
Vt()hys = Vt()hi − Vt()lo
140 250
905 Ipu(NERR) Pull-up Current
V(NERR) = 0...VPD − 1 V
-800 -300
906 Isc()lo
Short-Circuit Current NERR
V(NERR) = V(VPD), 25°C
50
907 tf(NERR) Decay Time NERR
CL = 50 pF
Max.
1.2
18
0.35
15
0.5
0.4
0.4
80
60
60
2
65
-6
10
2
1.2
7.1
2
55
-6
2
0.4
-80
80
60
Unit
MHz
MHz
Bit
Deg
%
MHz
MHz
Deg
Deg
V
V
mA
mA
ns
ns
V
V
mV
µA
µA
MHz
V
V
mV
V
V
V
V
V
kΩ
µA
V
V
V
mV
µA
mA
ns