IC-MH_17 Datasheet, PDF (23/26 Pages) IC-Haus GmbH – 12-BIT ANGULAR HALL ENCODER

iC-MH
12-BIT ANGULAR HALL ENCODER
OTP PROGRAMMING
Rev C2, Page 23/26
Once the RAM parameters have been configured these
settings can be written to the underlying zapping ROM.
START
As a requirement for programming, a zapping voltage
(nominal 7 V, see item 806 in the electrical characteris-
tics for tolerances) has to be provided via pin VZAP and
VNA. Also, the device is not in the test mode, e.g. the
test register has to be set to TEST = 0x00. Temporary,
CIBM has to be set to 0x0.
SET CONFIGURATION
SET CIBM = 0x0
Then the internal programming algorithm for the ZAP
diodes is started by setting the bit PROGZAP. When
programming routine terminates, the PROGZAP bit re-
sets automatically. Successful programming is then
indicated by the status register (address 0x77) when bit
PROGOK is set and PROGERR is unset - otherwise,
an error situation has occurred (like missing zapping
voltage).
PROGOK
0
0
1
1
PROGERR
0
1
0
1
Corrective actions
Set VZAP to 7 V
Set VZAP to 7 V and TEST = 0x00
Zapping was successful
Undefined state
Table 32: Zapping results
The following sequence has to be performed according
to Fig. 25 to verify zapping ROM content:
SET ALREADY PROG. BITS = 0
START HW ZAP ALGORITHM
SET ADR 0x0F = 0x01
VPD = VPA = 5.0V
FALSE
FALSE
VERIFY
VPD = VPA = 5.5V
CIBM = 0x0
TRUE
VERIFY
VPD = VPA = 4.0V
CIBM = 0xF
TRUE
STOP
Figure 25: Programming algorithm
CIBM is first set to 0x0 at address 0x04 and the hard-
ware programming algorithm started by bit PROGZAP.
After programming, as a first verification step, set CIBM
back to 0x0 and change VPD, VPA to a high supply
voltage of 5.5 V. Then read-out the ROM value which
should not differ from the intended programmed con-
figuration. (In case of differences, a new programming
run is needed.) The second verification step requires
setting CIBM to its maximum value of 0xF and changing
VPD, VPA to a low supply voltage of 4.0 V, again fol-
lowed by a read out of the ROM. If both kind of readouts
at these extreme settings are showing no deviations
from the expected values, the the verification process
has completed.
For reliable ROM writing, a low impedance connection
path as shown in figure 26 must be established for the
VZAP blocking capacitor (about 100 nF) between pin
VZAP and pin VNA to ensure stable VZAP voltage dur-
ing programming. A further capacitor of 10 µF which
may be located externally (e.g. on the programming
board) is recommended for additional blocking purpose.
When a register bit has to be programmed once again
after verifying failed, already programmed register bits
need not be programmed and the corresponding RAM
register bits have to be set to 0.
100 nF
100 nF
VPD VPA
VZAP
MA
iC-MH
SLI
SLO
VND VNA
100 nF 10 µF
Programming
Board
+ 5V
+ 7V
Serial
Interface
0V
Figure 26: Recommended setup for external program-
ming. A short low impedance path (shown in
light red) must be provided directly from pin
VZAP to pin VNA