IC-MU150 Datasheet, PDF (48/64 Pages) IC-Haus GmbH – MAGNETIC OFF-AXIS POSITION ENCODER - POLE WIDTH 1.50MM

iC-MU150 MAGNETIC OFF-AXIS
POSITION ENCODER - POLE WIDTH 1.50MM
REGISTER ACCESS THROUGH SERIAL INTERFACE (SPI AND BISS)
Rev B1, Page 48/64
scope of serial interface register view
access
via
EEPROM
SPI
BiSS
SSI
ADDR/
ADDR. SER
iC-MU150
Note:
ADDR is used in register
tables to indicate the address
of the corresponding
parameter. If the addressing
scheme differs between the
EEPROM and the serial
interface ADDR. SER is used
to indicate the addressing
through the serial interface.
Figure 48: Scope of register mapping serial interface
The distribution of addresses in iC-MU150 corresponds
to the document BiSS C Protocol Description which can
be downloaded at www.biss-interface.com.
The abbreviation Addr. SER used in the register ta-
bles of the specification of the iC-MU150 stands for the
addressing of this register through the serial interface.
iC-MU150 supports an addressing scheme using banks.
Therefore the internal address space is divided into
banks of 64 bytes each. The address sections visible
via the I/O interface recognizes a ”dynamic” section
(addresses 0x00 to 0x3F) and a ”static” section which
is permanently visible (addresses 0x40 to 0x7F). The
static address section is always visible independent of
the bank currently selected. Figure 50 illustrates how
the banks selected by BANKSEL are addressed.
BANKSEL(4:0) Addr. SER:0x40; bit 4:0
Code
Description
0x0
...
Selection of the memory bank
0x1F
The address translation for the addressable memory
areas via the bank register to the EEPROM addresses
is shown in Table 93.
Code
CONF
EDS
USER
Bank
0
1
...
4
5
...
31
Memory location
during operation
internal register
E2P:
0x040-0x07F
...
E2P:
0x100-0x13F
E2P:
0x140-0x17F
...
E2P:
0x7C0-0x7FF
Mode
iC-MU150
configuration data
Electronic-Data--
Sheet
OEM data, free
user area
Table 93: Address translation Addr Ser: 0x00-0x3F
Table 92: Register to select a memory bank
After startup the BANKSEL register is set to 0.
CONF: Bank 0, Addresses 0x00-0x3F
Addr.
SER
Bit 7
Bit 6
Bit 5
0x00
GC_M(1:0)
0x01
0x02
0x03
0x04
PHR_M
0x05
ENAC
0x06
GC_N(1:0)
0x07
Bit 4
Bit 3
Bit 2
Bit 1
GF_M(5:0)
GX_M(6:0)
VOSS_M(6:0)
VOSC_M(6:0)
PH_M(6:0)
GF_N(5:0)
GX_N(6:0)
CIBM(3:0)
Bit 0