IC-MU150 Datasheet, PDF (41/64 Pages) IC-Haus GmbH – MAGNETIC OFF-AXIS POSITION ENCODER - POLE WIDTH 1.50MM

iC-MU150 MAGNETIC OFF-AXIS
POSITION ENCODER - POLE WIDTH 1.50MM
The code direction of the read multiturn data can be
inverted using parameter ROT_MT.
ROT_MT
Code
0
1
Addr. 0x0E; bit 5
Function
no inversion of code direction
inversion of code direction
Table 65: Inverted code direction of external multiturn
Rev B1, Page 41/64
1-18 bit
MODE_MT
1-4 bit
SBL_MT
SYNC BITS
read-in multiturn
invert bits according
to ROT_MT
+
SYNC BITS
ROT_MT
SPO_MT
multiturn to be
synchronized to
internal singleturn
The parameter ESSI_MT configures the evaluation of
an optional error-bit send by the external multiturn de-
vice.
synchronization unit
multiturn
singleturn value
ESSI_MT
Code
0x0
0x1
0x2
0x3
Addr. 0x0E; bit 7:6
Function
no error bit
1 error-bit low active
reserved
1 error-bit high active
Table 66: Evaluation of an error-bit of the external mul-
titurn
Figure 40: Parameters to configure external multi-
turn
CHK_MT can be used to verify the counted multiturn
at regular intervals. Verification can also be requested
using command MT_VER. A multiturn verification error
(comparison of the internal MT counter with the external
multiturn data) is reported on status bit MT_CTR.
The total data length of the external read multiturn data
word is determined by:
CHK_MT
Code
0
1
Addr. 0x10; bit 6
Function
no verification
periodical verification
Table 68: Multiturn verification
data_length_ext_mt = Bits(MODE_MT) + Bits(SBL_MT) + Bits(ESSI_MT)
normal operation
The parameter SPO_MT allows to balance an existing
static offset between the singleturn and the multiturn.
The offset is added before the synchronization of the
read multiturn data (see Figure 40).
SPO_MT
Code
0x0
...
0xF
Addr. 0x0F; bit 7:4
Function
multiturn offset
Table 67: Offset of external multiturn
CHK_MT?
yes
read external
multiturn
no
serial comm. error
yes
reset
MT_ERR
set MT_ERR
reset
MT_CTR
sync to ST period information
and compare to MT counter
no
compare error
yes
set MT_CTR
Figure 41: Error handling in normal operation with
cyclic verification of the period counter