IC-MN Datasheet, PDF (38/59 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
I/O INTERFACE with EXTENDED FUNCTIONS
Rev D1, Page 38/59
Protocol
For the fast and safe transmission of converter data iC-
MN’s serial I/O interface has a BiSS C protocol which
enables bidirectional register communication without
changing the permanent cyclic data output. In order to
simplify master implementation at the control unit end
this protocol does not utilize multicycle data.
Alternatively, an advanced SSI protocol can be se-
lected which permits unidirectional register communi-
cation for the transferral of parameters from the master
to the slave iC-MN.
NBISS
Code
0
1
1
TOS
Code
00
01
10
11
Notes
Addr. 0x3F; bit 3
Protocol
BiSS C protocol (NC_BiSS = 0, RSSI = 1)
Advanced SSI protocol (NC_BiSS = 0)
SSI protocol (NC_BiSS = 1)
Table 57: Interface protocol
Addr. 0x4C; bit 1:0
Timeout t_out
Internal clock counts
typ. 16 µs
31-32
typ. 8 µs
15-16
typ. 2 µs
3-4
typ. 1 µs
1-2
One
clock
count
is
equal
to
4
fosc
(see
Char.
A01)
Table 58: Timeout
Figure 16: Example of line signals for BiSS C protocol
Figure 17: Example of line signals for Advanced SSI protocol