IC-MN Datasheet, PDF (37/59 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
Output Options
ESSI
Code
0
1
Addr. 0x3F; bit 5
Error bit output
Not included
Error bit enabled
Table 53: Error bit
GRAY_SCD
Addr. 0x3F; bit 7
Code
Data format
0
Binary coded
1
Gray coded
Table 54: Data format (covers MT and ST data)
RSSI
Code
0
1
Notes
Rev D1, Page 37/59
Addr. 0x3F; bit 4
Ring operation
Normal output
If the clock count exceeds the data length, zero bits
are supplied.
Ring operation
When enabling RSSI with the BiSS C protocol, pin
SLI reads in data to be output via SLO.
Table 55: Ring operation
The behavior of the output data depending on the
sense of rotation can be altered using pin DIR or via
register DIR. Both signals are EXOR-gated and switch
output data from increasing to decreasing values or
vice versa.
DIR
Code
0
1
Addr. 0x3D; bit 6
Code direction
Not inverted
Inverted
Table 56: Code direction up/down