IC-MN Datasheet, PDF (21/59 Pages) IC-Haus GmbH – 25-BIT NONIUS ENCODER WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION

iC-MN 25-BIT NONIUS ENCODER
WITH 3-CH. SAMPLING 13-BIT Sin/D INTERPOLATION
OPERATING MODES and CALIBRATION PROCEDURES
Rev D1, Page 21/59
iC-MN supports a number of different calibration
strategies, providing both digital and analog test sig-
nals to this end. The following tables give the various
modes of operation.
For the adjustment of the signal conditioning unit
analog test signals are output in analog calibration
modes ANA_x, with digital signals activated by digital
calibration modes DIG_x, enabling the signal condi-
tioning to be set across measurements of various duty
cycles. The order of the procedure for both modes of
calibration is described in the following chapter.
Alternatively, with an active signal level controller iC-
MN can be calibrated in controller modes AAC_x,
where the residual signal ripple is minimized. For this
purpose the signal gain, offset and phase correction
parameters must be set in such a way that the con-
troller signal CGUCKx available at pin T0 are devoid of
AC contents.
In calibration modes TWIB and TEIB the temper-
ature monitoring and bias reference source IBP can
be adjusted. Here the temperature threshold is set to
the required value for either warning or shutdown; the
other value is determined by the fixed difference of the
switching thresholds.
As the VTTx measurement voltages and CGUCKx sig-
nals are only available via a buffer stage the buffer off-
set voltage must be taken into account if the tempera-
ture thresholds are to be adjusted with any accuracy.
To this end the buffer offset voltage can be measured
in calibration mode TBOS. A voltage is then applied
to pin T1, with the buffer offset voltage being the differ-
ence between this and pin T0.
Parameter
Output Signals
Op. Mode TRACMODE CALMODE BYP* Pins PSOUT, NSOUT, PCOUT, NCOUT Pin T0 Pin T1 Pin DIR
Normal 0
0
Output of master track via line driver
0
0
-
Table 8: Normal operating mode
Parameter
Output Signals
Op. Mode TRACMODE CALMODE BYP* Pins PSOUT, NSOUT, PCOUT, NCOUT Pin T0
Pin T1 Pin DIR
Signal calibration modes with VDCx intermediate voltages
ANA_M 1
0
0 Calib. signals of master chan.
SVDCM CVDCM -
1
0
1 PSINM, NSINM, PCINM, NCINM
SVDCM CVDCM -
ANA_S 2
0
0 Calib. signals of segment chan.
SVDCS CVDCS -
2
0
1 PSINS, NSINS, PCINS, NCINS
SVDCS CVDCS -
ANA_N 3
0
0 Calib. signals of nonius chan.
SVDCN CVDCN -
3
0
1 PSINN, NSINN, PCINN, NCINN
SVDCN CVDCN -
Signal calibration modes with AC noise evaluation (with active sine-square level controlling)
AAC_M 1
4
Calib. signals of master chan.
CGUCKM
-
AAC_S 2
4
Calib. signals of segment chan.
CGUCKS -
-
AAC_N 3
4
Calib. signals of nonius chan.
CGUCKN -
-
Bias calibration, temperature-sensor calibration, and buffer offset measurement
TWIB
0
5
Output of master track via line driver
VTSw
VTth IBP
TEIB
0
6
Output of master track via line driver
VTSe
VTtherr IBP
TBOS
0
7
Output of master track via line driver
BUFFOUT BUFFIN -
Notes
S/D conversion modes with a cyclic conversion, such as 0x08, 0x09, 0x0A, are not permitted during
signal calibration. Cyclic BiSS data requests must also be avoided due to its trigger for sample-and-hold.
Analog calibration signals are output via 5 kΩ source impedance. The maximum permissible signal
frequency is 2 kHz for a load of 200 pF (see Elec. Char. 709, 710)
* Bypass function: inputs (without voltage divider) to outputs, ca. 7 kΩ source impedance
Table 9: Operating modes for analog signal calibration