IC-MR Datasheet, PDF (32/44 Pages) IC-Haus GmbH – 13-BIT S&H SIN/COS INTERPOLATOR WITH CONTROLLER INTERFACES

iC-MR 13-BIT S&H SIN/COS
preliminary
INTERPOLATOR WITH CONTROLLER INTERFACES
NL
NCS
NWR
NRD
D(7:0)
0x60
0x00
0x60
STATUS
0x62
ST
Rev A1, Page 32/44
0x63
ST
Request Position
Wait for PDV=1
Read Data
Figure 21: Position data output at request by command
If it is not possible to extend the NRD pulse to wait
for data validity, the status register must be continually
read out anew until pin D0 supplies a high (PDV = 1).
After this, the position data can be read out on a read
register access.
When reading out position data through pin NL,
the request is made directly on the falling edge
at pin NL. While NL = low, the status and posi-
tion data are output on consecutive read accesses
(NRD = high → low → high).
As the position data registers are read out individu-
ally following a request for position data by command,
no CRC is formed across the position data. The life
counter function continues to be active, however.
It is not necessary to write to the register addresses
in this operating mode, as this is only used for the fast
readout of sensor data.
NL
NCS
NRD
D(7:0)
Statusbit PDV
Status
ST
ST
ST
ST
MT
MT
MT
LC
ERR
TMP
TMP
CRC
CRC
ADDR int
0x60
Wait for PDV=1
PosData
Request
0x61
0x62
0x63
0x64
0x65
0x66
0x67
0x68
Read Data
0x69
0x6A
0x6B
0x6C
0x6D
Figure 22: Position data output at request by pin NL
The status register data is output first. During the sta-
tus register readout NRD should remain low until pin
D0 (in this case, PDV) switches to high, as this indi-
cates the validity of the position data.
On each rising edge at NRD the internal address is
increased, after which the position data can be read
out with each low signal at NRD.
The various ways of outputting position data in this
operating mode are set in register FULL_CYC. If bit
FULL_CYC is set (Table 49), registers 0x60-0x6D are
output on each cyclic access. If this bit is disabled,