IC-LNB_13 Datasheet, PDF (18/35 Pages) IC-Haus GmbH – 18-BIT OPTO ENCODER WITH SPI AND SER/PAR INTERFACES

iC-LNB 18-BIT OPTO ENCODER ^preliminary
WITH SPI AND SER/PAR INTERFACES
Reset values
After power-on the registers are initialized as follows:
Address
0x00-0x01
Reset
Value
0xA0
0x02-0x05 0xC0
0x06
0x60
0x07
0x09
0x08
0x18
0x09-0x0A 0x00
0x0B
0x8E
0x0C-0x10 0x00
0x11
0xA0
Description
Gain (GS, GC) = 1.408
LED control behaivor (LCMOD) = 0
Offset (OSP, OSN, OCP, OCN) =
0.5004*VDDA
LED control mode (LCTYP) = sum
control, Set point (LCSET) = 0.23 V
Shift register output format
(NGRAY) = GRAY,
Direction (DIR) = CW,
EPG = interface mode,
Oscillator (OSZC) = 14.4MHz,
Gain range (GR) = 1.33
Interpolator factor (INC) = x2,
Idle state DOUT (RNF) = ’1’,
Shift register (SRC) = 18 bit
Test functions = 0,
Hysteresis (HYS) = 0°
ABZ outputs (INVA/B/Z) = not
inverted,
ABZ outputs (TRIABZ) = tri-state,
Shift register (SELABS) = max.
resolution,
FlexCount (NENFLEX) = disabled
FlexCount parameters = 0
FlexCount:
Outputs (NOUTLO) = low,
Reset (STOPFLEX) = stopped,
Interpolator (ENIPO) = disabled
Table 7: Register reset values (RAM)
Rev A1, Page 18/35
abled (ENIPO). The drivers at the A/B/Z outputs are
then switched from tristate to push-pull state.
If the device is to be operated with FlexCount, the user
then decides whether to leave the A/B/Z outputs in
low or switch these to tristate (TRIABZ). After configur-
ing all parameters, FlexCount is enabled (STOPFLEX
1 → 0). After the current position has been found
(POSOK), the A/B/Z outputs can be enabled (TRIABZ
or NOUTLO).
Power On
(POK = 1)
write addresses 0x00 - 0x09
Yes
enable
No
Flexcount?
INCA, INCB, INCZ ^low
tristate or low?
tristate
write addresses 0x0A – 0x10
0x0B: TRIABZ = 1
write address 0x11
NOUTLO = 1, ENIPO = 1,
RESSUB
write address 0x11
STOPFLEX = 0
write addresses 0x0A – 0x10
0x0B: TRIABZ = 0
write address 0x11
NOUTLO = 0, ENIPO = 1,
RESSUB
write address 0x11
STOPFLEX = 0
write address 0x0E
RESIPO
write address 0x11
ENIPO = 1
write address 0x0B
TRIABZ = 0
Programming sequence
Following iC-LNB’s system reset (POK lo → hi) the in-
ternal RAM must be configured to through the SPI in-
terface. A microcontroller with an integrated EEPROM
and SPI master is usually used for this purpose. De-
pending on the required function the parameters must
be written in a certain order (Figure 4).
If iC-LNB is to be used without FlexCount, only the re-
quired interpolator resolution is set (RESIPO) and en-
read address 0x12 ^No
POSOK = 1?
Yes
write address 0x0B
TRIABZ = 0
read address 0x12 ^No
POSOK = 1?
Yes
write address 0x11
NOUTLO = 1
configuration
finished
Figure 4: Example of a typical configuration se-
quence