IC-LNB_13 Datasheet, PDF (12/35 Pages) IC-Haus GmbH – 18-BIT OPTO ENCODER WITH SPI AND SER/PAR INTERFACES

iC-LNB 18-BIT OPTO ENCODER ^preliminary
WITH SPI AND SER/PAR INTERFACES
Rev A1, Page 12/35
ELECTRICAL CHARACTERISTICS
Operating conditions: VDDA = 4 V to 5.5 V, VDD = 3 V to 5.5 V, GNDA = GND, Tj = -40 °C to 125 °C, unless otherwise specified.
Item Symbol Parameter
No.
Conditions
Min. Typ. Max.
Shift Register CLK, NSL, DOUT, DIN
B01 Vs()hi
Saturation Voltage hi at DOUT Vs()hi = VDD - V();
400
VDD = 3 . . . 4 V, I() = 1.5 mA
VDD = 4 . . . 5.5 V, I() = 2.5 mA
B02 Isc()hi
Short-Circuit Current hi at DOUT
-100
-1.5
B03 Vs()lo
Saturation Voltage lo at DOUT VDD = 3 . . . 4 V, l() = 1.5 mA
400
VDD = 4 . . . 5.5 V, l() = 2.5 mA
B04 Isc()lo
Short-Circuit Current lo at DOUT
1.5
100
B05 fin()
Permissible Clock Frequency at
16
CLK
B06 Vt()hi
Threshold Voltage hi at CLK,
2
NSL, DIN
B07 Vt()lo
Threshold Voltage lo at CLK,
0.8
NSL, DIN
B08 Vt()hys Hysteresis at CLK, NSL, DIN Vt()hys = Vt()hi - Vt()lo
40 100
B09 Ipu()
Pull-Up Current at CLK, NSL
V() = 0 . . . VDD - 1 V;
VDD = 3 . . . 4 V
VDD = 4 . . . 5.5 V
-65 -25
-5
-120 -60 -10
B10 Vpu()
Pull-Up Voltage at CLK, NSL Vpu() = VDD - V();
400
VDD = 3 . . . 4 V, I() = -3 µA
VDD = 4 . . . 5.5 V, I() = -5 µA
B11 Ipd()
Pull-Down Current at DIN
V() = 1 V . . . VDD;
VDD = 3 . . . 4 V
VDD = 4 . . . 5.5 V
5
25
80
8
60 150
B12 Vpd()
Pull-Down Voltage at DIN
VDD = 3 . . . 4 V, I() = 3 µA
400
VDD = 4 . . . 5.5 V, I() = 5 µA
B13 tp3()
Propagation Delay: DOUT Idle see Figure 3
20
State after Falling Edge NSL
B14 tp4()
Propagation Delay: DOUT stable see Figure 3
20
after Clock Edge CLK
Parallel Outputs Bit 0 . . . 15 (parameter EPG = 0x1)
Pins: TNC, TNS, DIR, NSL, DIN, DOUT, CLK, GA, GB, XJD, POK, INCZ, INCB, INCA, TPS, TPC
C01 Vs()hi
Saturation Voltage hi
Vs()hi = VDD - V();
400
VDD = 3 . . . 4 V, I() = 1.5 mA,
VDD = 4 . . . 5.5 V, I() = 2.5 mA
C02 Isc()hi
Short-Circuit Current hi
-100
-1.5
C03 Vs()lo
Saturation Voltage lo
VDD = 3 . . . 4 V, l() = 1.5 mA,
400
VDD = 4 . . . 5.5 V, l() = 2.5 mA
C04 Isc()lo
Short-Circuit Current lo
1.5
100
C05 tr()
Rise Time
CL = 30 pF, V(): 10% → 90% VDD
30
C06 tf()
Fall Time
CL = 30 pF, V(): 90% → 10% VDD
30
Power-On-Reset POK
D01 Vs()hi
Saturation Voltage hi
Vs()hi = VDD - V();
400
VDD = 3 . . . 4 V, I() = 1.5 mA,
VDD = 4 . . . 5.5 V, I() = 2.5 mA
D02 Isc()hi
Short-Circuit Current hi
-100
-1.5
D03 Vs()lo
Saturation Voltage lo
VDD = 3 . . . 4 V, l() = 1.5 mA,
400
VDD = 4 . . . 5.5 V, l() = 2.5 mA
D04 Isc()lo
Short-Circuit Current lo
1.5
100
D05 VDDAon Turn-on Threshold VDDA,
Power-on-release
increasing voltage at VDDA;
POK: lo → hi
3.6 3.8 4.0
D06 VDDAoff Turn-off Threshold VDDA,
Power-down-reset
decreasing voltage at VDDA;
EPG = 0, POK: hi → lo
3.3 3.5 3.7
D07 VDDAhys Hysteresis
VDDAhys = VDDAon - VDDAoff
0.2 0.3
Code Inversion Input DIR
E01 Vt()hi
Threshold Voltage hi
2
Unit
mV
mA
mV
mA
MHz
V
V
mV
µA
µA
mV
µA
µA
mV
ns
ns
mV
mA
mV
mA
ns
ns
mV
mA
mV
mA
V
V
V
V