HY5DW113222FMP Datasheet, PDF(29/30 Page) Hynix Semiconductor

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HY5DW113222FMP Datasheet, PDF (29/30 Pages) Hynix Semiconductor – 512M(16Mx32) GDDR SDRAM

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HY5DW113222FM(P)

CAPACITANCE (TA=25oC, f=1MHz )

Parameter

Input Clock Capacitance

Input Capacitance

Input / Output Capacitance

CK, /CK

All other input-only pins

DQ, DQS, DM

Symbol

Min

Max

Unit

CCK

1.5

5.5

CIN

1.5

5.5

CIO

5.5

9.5

Note :

1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V

2. Pins not under test are tied to GND.

3. These values are guaranteed by design and are tested on a sample basis only.

OUTPUT LOAD CIRCUIT

VTT

RT=50â¦

Output

Zo=50â¦

CL=30pF

VREF

Rev. 0.1 / Oct. 2004

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