HY5DW113222FMP Datasheet, PDF (14/30 Pages) Hynix Semiconductor – 512M(16Mx32) GDDR SDRAM

SIMPLIFIED STATE DIAGRAM
HY5DW113222FM(P)
MODE
REGISTER
SET
*1
MRS
PDEN
IDLE
POWER
DOWN
PDEX
ACT
POWER
DOWN
PDEN
PDEX
BANK
ACTIVE
SREF
SREX
AREF
SELF
REFRESH
AUTO
REFRESH
BST
WRITE
WRITE
*2
READ
READAP
WRITEAP
WRITE _*2
WITH
AUTOPRE-
CHARGE
READ ^*2
WITH READAP
AUTOPRE-
CHARGE _WRITEAP
READ
READ
*2
PRE(PALL)
PRE-
CHARGE
WRITE
PRE(PALL)
POWER-UP
POWER APPLIED
Note:
*1.Both of CS0 and CS1 should be enabled in pairs.
*2.Both of CS0 and CS1 should be enabled, individually.
Rev. 0.1 / Oct. 2004
Command Input
Automatic Sequence
14