HY57V651620B Datasheet, PDF (11/12 Pages) Hynix Semiconductor – 4 Banks x 1M x 16Bit Synchronous DRAM

COMMAND TRUTH TABLE
HY57V651620B
Command
A10/
CKEn-1 CKEn
CS
RAS CAS
WE
DQM
ADDR
BA
AP
Mode Register Set
H
No Operation
H
Bank Active
H
Read
H
Read with Autoprecharge
Write
H
Write with Autoprecharge
Precharge All Banks
H
Precharge selected Bank
Burst Stop
H
DQM
H
Auto Refresh
H
Entry
H
Self Refresh¹
Exit
L
Entry
H
Precharge
power down
Exit
L
Clock
Suspend
Entry
H
Exit
L
X
L
L
L
L
X
OP code
H
X
X
X
X
X
X
L
H
H
H
X
L
L
H
H
X
RA
V
L
X
L
H
L
H
X
CA
V
H
L
X
L
H
L
L
X
CA
V
H
H
X
X
L
L
H
L
X
X
L
V
X
L
H
H
L
X
X
X
V
X
H
L
L
L
H
X
X
L
L
L
L
H
X
H
X
X
X
X
H
X
L
H
H
H
H
X
X
X
L
X
L
H
H
H
X
H
X
X
X
H
X
L
H
H
H
H
X
X
X
L
X
L
V
V
V
X
H
X
X
Note
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2 . X = D o n′t c a r e , H = L o g i c H i g h , L = L o g i c L o w . B A = B a n k A d d r e s s , R A = R o w A d d r e s s , C A = C o l u m n A d d r e s s ,
Opcode = Operand Code, NOP = No Operation
Rev. 1.9/Apr.01
11