H49R50A-1 Datasheet, PDF (9/45 Pages) Holtek Semiconductor Inc – LCD Type 8-Bit MCU

HT49R50A-1/HT49C50-1/HT49C50L
When a control transfer takes place, an additional
dummy cycle is required.
Program Memory - ROM
The program memory (ROM) is used to store the pro-
gram instructions which are to be executed. It also con-
tains data, table, and interrupt entries, and is organized
into 4096 ´ 15 bits which are addressed by the program
counter and table pointer.
Certain locations in the ROM are reserved for special
usage:
· Location 000H
Location 000H is reserved for program initialization.
After chip reset, the program always begins execution
at this location.
· Location 004H
Location 004H is reserved for the external interrupt
service program. If the INT0 input pin is activated, and
the interrupt is enabled, and the stack is not full, the
program begins execution at location 004H.
· Location 008H
Location 008H is reserved for the external interrupt
service program also. If the INT1 input pin is activated,
and the interrupt is enabled, and the stack is not full,
the program begins execution at location 008H.
· Location 00CH
Location 00CH is reserved for the Timer/Event Coun-
ter 0 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 0 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 00CH.
· _{Location 010H}
Location 010H is reserved for the Timer/Event Coun-
ter 1 interrupt service program. If a timer interrupt re-
sults from a Timer/Event Counter 1 overflow, and if the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at location 010H.
· _{Location 014H}
Location 014H is reserved for the Time Base interrupt
service program. If a Time Base interrupt occurs, and
the interrupt is enabled, and the stack is not full, the
program begins execution at location 014H.
000H
D e v ic e in itia liz a tio n p r o g r a m
004H
E x te r n a l in te r r u p t 0 s u b r o u tin e
008H
E x te r n a l in te r r u p t 1 s u b r o u tin e
0 0 C H _{T im e r /e v e n t c o u n te r 0 in te r r u p t s u b r o u tin e}
010H
T im e r /e v e n t c o u n te r 1 in te r r u p t s u b r o u tin e
014H
T im e B a s e In te r r u p t
018H
R T C In te rru p t
P ro g ra m
ROM
n00H
L o o k - u p ta b le ( 2 5 6 w o r d s )
nFFH
F00H
L o o k - u p ta b le ( 2 5 6 w o r d s )
FFFH
1 5 b its
N o te : n ra n g e s fro m 0 to F
Program Memory
· Location 018H
Location 018H is reserved for the real time clock inter-
rupt service program. If a real time clock interrupt oc-
curs, and the interrupt is enabled, and the stack is not
full, the program begins execution at location 018H.
· Table location
Any location in the ROM can be used as a look-up ta-
ble. The instructions ²TABRDC [m]² (the current page,
1 page=256 words) and ²TABRDL [m]² (the last page)
transfer the contents of the lower-order byte to the
specified data memory, and the contents of the
higher-order byte to TBLH (Table Higher-order byte
register) (08H). Only the destination of the lower-order
byte in the table is well-defined; the other bits of the ta-
ble word are all transferred to the lower portion of
TBLH, and the remaining 1 bit is read as ²0². The
TBLH is read only, and the table pointer (TBLP) is a
read/write register (07H), indicating the table location.
Before accessing the table, the location should be
placed in TBLP. All the table related instructions re-
quire 2 cycles to complete the operation. These areas
may function as a normal ROM depending upon the
user¢s requirements.
Instruction(s)
*11 *10 *9
TABRDC [m]
P11 P10 P9
TABRDL [m]
1
1
1
Note: *11~*0: Table location bits
@7~@0: Table pointer bits
Table Location
*8
*7
*6
*5
*4
*3
*2
*1
*0
P8 @7 @6 @5 @4 @3 @2 @1 @0
1 @7 @6 @5 @4 @3 @2 @1 @0
Table Location
P11~P8: Current program Counter bits
Rev. 2.00
9
November 29, 2005