H49R50A-1 Datasheet, PDF (27/45 Pages) Holtek Semiconductor Inc – LCD Type 8-Bit MCU

HT49R50A-1/HT49C50-1/HT49C50L
Mnemonic
Description
Branch
JMP addr
SZ [m]
SZA [m]
SZ [m].i
SNZ [m].i
SIZ [m]
SDZ [m]
SIZA [m]
SDZA [m]
CALL addr
RET
RET A,x
RETI
Jump unconditionally
Skip if data memory is zero
Skip if data memory is zero with data movement to ACC
Skip if bit i of data memory is zero
Skip if bit i of data memory is not zero
Skip if increment data memory is zero
Skip if decrement data memory is zero
Skip if increment data memory is zero with result in ACC
Skip if decrement data memory is zero with result in ACC
Subroutine call
Return from subroutine
Return from subroutine and load immediate data to ACC
Return from interrupt
Table Read
TABRDC [m] Read ROM code (current page) to data memory and TBLH
TABRDL [m] Read ROM code (last page) to data memory and TBLH
Miscellaneous
NOP
CLR [m]
SET [m]
CLR WDT
CLR WDT1
CLR WDT2
SWAP [m]
SWAPA [m]
HALT
No operation
Clear data memory
Set data memory
Clear Watchdog Timer
Pre-clear Watchdog Timer
Pre-clear Watchdog Timer
Swap nibbles of data memory
Swap nibbles of data memory with result in ACC
Enter power down mode
Instruction
Flag
Cycle
Affected
2
None
1⁽²⁾
None
1⁽²⁾
None
1⁽²⁾
None
1⁽²⁾
None
1⁽³⁾
None
1⁽³⁾
None
1⁽²⁾
None
1⁽²⁾
None
2
None
2
None
2
None
2
None
2⁽¹⁾
None
2⁽¹⁾
None
1
None
1⁽¹⁾
None
1⁽¹⁾
None
1
TO,PDF
1
TO⁽⁴⁾,PDF⁽⁴⁾
1
TO⁽⁴⁾,PDF⁽⁴⁾
1⁽¹⁾
None
1
None
1
TO,PDF
Note: x: Immediate data
m: Data memory address
A: Accumulator
i: 0~7 number of bits
addr: Program memory address
Ö: Flag is affected
-: Flag is not affected
(1)_{: If a loading to the PCL register occurs, the execution cycle of instructions will be delayed for one more cycle}
(four system clocks).
(2)_{: If a skipping to the next instruction occurs, the execution cycle of instructions will be delayed for one more}
cycle (four system clocks). Otherwise the original instruction cycle is unchanged.
(3)_: (1) _and (2)
(4)_{: The flags may be affected by the execution status. If the Watchdog Timer is cleared by executing the}
CLR WDT1 or CLR WDT2 instruction, the TO and PDF are cleared.
Otherwise the TO and PDF flags remain unchanged.
Rev. 2.00
27
November 29, 2005