H49R50A-1 Datasheet, PDF (14/45 Pages) Holtek Semiconductor Inc – LCD Type 8-Bit MCU

HT49R50A-1/HT49C50-1/HT49C50L
S y s te m C lo c k /4
R TC
O SC
32768H z
W
O
DT
SC
12kH
z
O p tio n ^fS
S e le c t
D iv id e r
P r e s c a le r
W D T C le a r
Watchdog Timer
CK T
R
CK T
R
T im e - o u t R e s e t
fS /2 ¹⁶ ~ fS /2 ¹⁵
When the device operates in a noisy environment, using
the on-chip RC oscillator (WDT OSC) is strongly recom-
mended, since the HALT can stop the system clock.
The WDT overflow under normal operation initializes a
²chip reset² and sets the status bit ²TO². In the HALT
mode, the overflow initializes a ²warm reset², and only
the program counter and SP are reset to zero. To clear
the contents of the WDT, there are three methods to be
adopted, i.e., external reset (a low level to RES), soft-
ware instruction, and a ²HALT² instruction. There are
two types of software instructions; ²CLR WDT² and the
other set - ²CLR WDT1² and ²CLR WDT2². Of these
two types of instruction, only one type of instruction can
be active at a time depending on the options - ²CLR
WDT² times selection option. If the ²CLR WDT² is se-
lected (i.e., CLR WDT times equal one), any execution
of the ²CLR WDT² instruction clears the WDT. In the
case that ²CLR WDT1² and ²CLR WDT2² are chosen
(i.e., CLR WDT times equal two), these two instructions
have to be executed to clear the WDT; otherwise, the
WDT may reset the chip due to time-out.
Multi-function Timer
These devices provide a multi-function timer for the WDT,
time base and RTC but with different time-out periods. The
multi-function timer consists of a 7-stage divider and an
8-bit prescaler, with the clock source coming from the
WDT OSC or RTC OSC or the instruction clock (i.e., sys-
tem clock divided by 4). The multi-function timer also pro-
vides a selectable frequency signal (ranges from f_S/2² to
f_S/2⁸) for LCD driver circuits, and a selectable frequency
signal (ranges from f_S/2² to f_S/2⁹) for the buzzer output by
option. It is recommended to select a near 4kHz signal to
LCD driver circuits for proper display.
Time Base
The time base offers a periodic time-out period to gener-
ate a regular internal interrupt. Its time-out period
ranges from f_S/2¹² to f_S/2¹⁵ selected by options. If time
base time-out occurs, the related interrupt request flag
(TBF; bit 5 of INTC1) is set. But if the interrupt is en-
abled, and the stack is not full, a subroutine call to loca-
tion 14H occurs. The time base time-out signal also can
be applied to be a clock source of Timer/Event Counter
1 for getting a longer timer-out period.
fS
D iv id e r
P r e s c a le r
O p tio n
O p tio n
L C D D r iv e r ( fS /2 ² ~ fS /2 ⁸ )
B u z z e r (fS /2 ² ~ fS /2 ⁹ )
T im e B a s e In te rru p t
(fS /2 ¹² ~ fS /2 ¹⁵ )
Time Base
Real Time Clock - RTC
The real time clock (RTC) is operated in the same man-
ner as the time base that is used to supply a regular in-
ternal interrupt. Its time-out period ranges from f_S/2⁸ to
f_S/2¹⁵ by software programming . Writing data to RT2,
RT1 and RT0 (bit2, 1, 0 of RTCC;09H) yields various
time-out periods. If the RTC time-out occurs, the related
interrupt request flag (RTF; bit 6 of INTC1) is set. But if
the interrupt is enabled, and the stack is not full, a sub-
routine call to location 18H occurs. The real time clock
time-out signal also can be applied to be a clock source
of Timer/Event Counter 0 for getting a longer time-out
period.
RT2
0
0
0
0
1
1
1
1
RT1
0
0
1
1
0
0
1
1
RT0
0
1
0
1
0
1
0
1
RTC Clock Divided Factor
2^8*
2^9*
2^10*
2^11*
2¹²
2¹³
2¹⁴
2¹⁵
Note: ²*² not recommended to be used
fS
D iv id e r
P r e s c a le r
R T2
R T1
R T0
8 to 1
M ux.
f S / 2 ^{1 2}~ f S / 2 ^{1 5}
R T C In te rru p t
Real Time Clock
Rev. 2.00
14
November 29, 2005