HD404449 Datasheet, PDF (77/123 Pages) Hitachi Semiconductor – HD404449 SERIES

HD404449 Series
Timer read register D (lower digit) (TRDL: $011)
Bit
Initial value
Read/Write
Bit name
3
2
1
0
Undefined Undefined Undefined Undefined
R
R
R
R
TRDL3 TRDL2 TRDL1 TRDL0
Figure 63 Timer Read Register D Lower Digit (TRDL)
Timer read register D (upper digit) (TRDU: $012)
Bit
Initial value
Read/Write
Bit name
3
2
1
0
Undefined Undefined Undefined Undefined
R
R
R
R
TRDU3 TRDU2 TRDU1 TRDU0
Figure 64 Timer Read Register D Upper Digit (TRDU)
Detection edge register 2 (ESR2: $027)
Bit
Initial value
Read/Write
Bit name
3
0
W
ESR23
2
1
0
0
—
—
W
—
—
ESR22 Not used Not used
ESR23 ESR22 EVND detection edge
0
0
No detection
1
Falling-edge detection
1
0
Rising-edge detection
1
Double-edge detection*
Note: * Both falling and rising edges are detected.
Figure 65 Detection Edge Select Register 2 (ESR2)
Notes on Use
When using the timer output as PWM output, note the following point. From the update of the timer write
register until the occurrence of the overflow interrupt, the PWM output differs from the period and duty
settings, as shown in table 27. The PWM output should therefore not be used until after the overflow
interrupt following the update of the timer write register. After the overflow, the PWM output will have the
set period and duty cycle.
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