HD404449 Datasheet, PDF (58/123 Pages) Hitachi Semiconductor – HD404449 SERIES

HD404449 Series
Registers for Timer A Operation: Timer A operating modes are set by the following registers.
• Timer mode register A (TMA: $008): Four-bit write-only register that selects timer A’s operating mode
and input clock source as shown in figure 41.
Timer mode register A (TMA: $008)
Bit
Initial value
Read/Write
Bit name
3
0
W
TMA3
2
0
W
TMA2
1
0
W
TMA1
0
0
W
TMA0
Source Input clock
TMA3 TMA2 TMA1 TMA0 prescaler frequency Operating mode
0
0
0
0 PSS
2048t_cyc Timer A mode
1 PSS
1024t_cyc
1
0 PSS
512t_cyc
1 PSS
128t_cyc
1
0
0 PSS
32t_cyc
1 PSS
8t_cyc
1
0 PSS
4t_cyc
1 PSS
2t_cyc
1
0
0
0 PSW
32t_Wcyc Time-base
mode
1 PSW
16t_Wcyc
1
0 PSW
8t_Wcyc
1 PSW
2t_Wcyc
1
0
0 PSW
1/2t_Wcyc
1 Inhibited
1 Don't PSW and TCA reset
care
Notes: 1. t_Wcyc = 244.14 µs (when a 32.768-kHz crystal oscillator is used)
2. Timer counter overflow output period (seconds) = input clock period (seconds) × 256.
3. The division ratio must not be modified during time-base mode operation, otherwise
an overflow cycle error will occur.
Figure 41 Timer Mode Register A (TMA)
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