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GS4576C36GL-25I Datasheet, PDF (9/63 Pages) GSI Technology – 576Mb CIO Low Latency DRAM (LLDRAM II)
Power–Up Initialization Flow Chart
Step
1
VDD and VEXT ramp
2
VDDQ ramp
3
Apply VREF and VTT
4
Apply stable CK/CK and DK/DK
5
Wait at least 200s
6
Issue MRS command—A10–A17 must be Low
7 Issue MRS command—A10–A17 must be Low
8 Desired load mode register with A10–A17 Low
9
Assert NOP for tMRSC
10
Issue AUTO REFRESH to bank 0
11
Issue AUTO REFRESH to bank 1
12
Issue AUTO REFRESH to bank 2
13
Issue AUTO REFRESH to bank 3
14
Issue AUTO REFRESH to bank 4
15
Issue AUTO REFRESH to bank 5
16
Issue AUTO REFRESH to bank 6
17
Issue AUTO REFRESH to bank 7
18
Wait 1024 NOP commands*
19
Valid command
GS4576C09/18/36L
Voltage rails can
be applied
simultaneously
MRS commands
must be on
consecutive
clock cycles
*Note:
The sequence of the eight AUTO REFRESH commands (with respect to the 1024 NOP commands) does not matter. As is required for any
operation, tRC must be met between an AUTO REFRESH command and a subsequent VALID command to the same bank.
Rev: 1.04 11/2013
9/62
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology