GS4576C36GL-25I Datasheet, PDF (45/63 Pages) GSI Technology – 576Mb CIO Low Latency DRAM (LLDRAM II)

GS4576C09/18/36L
Capacitance
Description
Address/control input capacitance
Input/Output capacitance (DQ, DM, and QK, QK)
Clock capacitance (CK/CK and DK/DK)
JTAG pins
Notes:
1. Capacitance is not tested on the ZQ pin.
2. JTAG Pins are tested at 50 MHz.
Symbol
C_I
C_O
C_CK
C_JTAG
Conditions
TA = 25° C; f = 100 MHz
V_DD = V_DDQ = 1.8 V
Min.
Max.
Unit
1.0
2.0
pF
3.0
4.5
pF
1.5
2.5
pF
1.5
4.5
pF
IDD Operating Conditions
Description
Standby Current
Active Standby Current
Operational Current
Operational Current
Operational Current
Burst Refresh Current
Condition
Symbol
-18 -24 -25 -33
tCK = idle, All banks idle; No inputs
toggling.
CS = 1, No commands; Bank address
incremented and half address/data change
once every four clock cycles.
BL = 2, Sequential bank access; Bank
transitions once every tRC; Half address
transitions once every tRC; Read followed
by Write sequence; Continuous data during
Write Commands.
I_SB1 (V_DD) x9/x18
I_SB1 (V_DD) x36
I_SB1 (V_EXT)
I_SB2 (V_DD) x9/x18
I_SB2 (V_DD) x36
I_SB2 (V_EXT)
I_DD1 (V_DD) x9/x18
I_DD1 (V_DD) x36
I_DD1 (V_EXT)
55 55 55 55
55 55 55 55 mA
5
5
5
5
385 360 360 340
385 360 360 340 mA
5
5
5
5
495 470 445 425
510 485 455 435 _mA
15 15 15 10
BL = 4, Sequential bank access; Bank
transitions once every t_RC; Half address
transitions once every t_RC; Read followed
by Write sequence; Continuous data during
Write Commands.
I_DD2 (V_DD) x9/x18
I_DD2 (V_DD) x36
I_DD2 (V_EXT)
495 480 450 435
540 525 485 470 _mA
25 25 25 20
BL = 8, Sequential bank access; Bank
transitions once every t_RC; Half address
transitions once every t_RC. Read followed
by Write sequence; Continuous data during
Write Commands.
I_DD3 (V_DD) x9/x18
I_DD3 (V_DD) x36
I_DD3 (V_EXT)
580 555 500 480
665 640 570 550 _mA
40 40 40 30
Eight bank cyclic refresh; Continuous
I_REF1 (V_DD) x9/x18 720 625 615 540
address/data; Command bus remains in
refresh for all eight banks.
I_REF1 (V_DD) x36
I_REF1 (V_EXT)
720 625 615 540 mA
60 60 60 45
Rev: 1.04 11/2013
45/62
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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