GS81314LQ19 Datasheet, PDF (31/39 Pages) GSI Technology – 144Mb SigmaQuad-IVe™ Burst of 2 Single-Bank ECCRAM™

GS81314LQ19/37GK-933/800
JTAG Test Mode Description
These devices provide a JTAG Test Access Port (TAP) and Boundary Scan interface using a limited set of IEEE std. 1149.1
functions. This test mode is intended to provide a mechanism for testing the interconnect between master (processor, controller,
etc.), ECCRAM, other components, and the printed circuit board. In conformance with a subset of IEEE std. 1149.1, these devices
contain a TAP Controller and multiple TAP Registers. The TAP Registers consist of one Instruction Register and multiple Data
Registers.
The TAP consists of the following four signals:
Pin
Pin Name
I/O
TCK
Test Clock
I
TMS
Test Mode Select
I
TDI
Test Data In
I
TDO
Test Data Out
O
Description
Induces (clocks) TAP Controller state transitions.
Inputs commands to the TAP Controller.
Sampled on the rising edge of TCK.
Inputs data serially to the TAP Registers.
Sampled on the rising edge of TCK.
Outputs data serially from the TAP Registers.
Driven from the falling edge of TCK.
Concurrent TAP and Normal ECCRAM Operation
According to IEEE std. 1149.1, most public TAP Instructions do not disrupt normal device operation. In these devices, the only
exceptions are EXTEST and SAMPLE-Z. See the Tap Registers section for more information.
Disabling the TAP
When JTAG is not used, TCK should be tied Low to prevent clocking the ECCRAM. TMS and TDI should either be tied High
through a pull-up resistor or left unconnected. TDO should be left unconnected.
JTAG DC Operating Conditions
Parameter
JTAG Input High Voltage
JTAG Input Low Voltage
JTAG Output High Voltage
JTAG Output Low Voltage
Notes:
1. Parameters apply to TCK, TMS, and TDI.
2. Parameters apply to TDO.
3. I_TOH = –2.0 mA.
4. I_TOL = 2.0 mA.
Symbol
V_TIH
V_TIL
V_TOH
V_TOL
Min
0.75 * V_DDQ
–0.15
V_DDQ – 0.2
—
Max
V_DDQ + 0.15
0.25 * V_DDQ
—
0.2
Units
V
V
V
V
Notes
1
1
2, 3
2, 4
Rev: 1.02 3/2016
31/39
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2015, GSI Technology