GX4002 Datasheet, PDF (39/74 Pages) Gennum Corporation – Dynamic on-chip power management control

The ADCDONECONV bit will always remain HIGH, indicating a valid converted value
is available for read-out. This flag may be cleared by writing to the ADCSTARTCONV bit
if positive indication of valid data is required.
3.7.1.2 ADC Control Registers
The following registers are used to select the various sources for conversion and
read-out through the ADC. The offset calibration controls ADCOFFCALEN[3:0]
facilitate calibrating the offsets of the selected sources:
Register Name
Register
Address^d
ADC_REG1
143
Parameter Name
ADCSRCSEL
ADCOFFCALEN
Bit
Position
Access
3:0
RW
7:4
RW
Reset Value^b
0000
0000
Valid
Range^d
Function
0-15
Selects input for ADC (see Table 3-3: ADC
Source Select).
0-15
Selects source for offset calibration (see
Table 3-2).
Table 3-3: ADC Source Select
ADCSRCSEL[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Source
0.9V
Ch0 Vertical Eye
Ch1 Vertical Eye
Ch0 Horizontal Eye
Ch1 Horizontal Eye
Ch0 Peak Detector
Ch1 Peak Detector
RSVD
RSVD
RSVD
Temperature Sensor
Supply Sensor
0.45V
1.35V
RSVD
RSVD
The following registers are used to program a calibrated offset for automatic offset
correction. ADCOFFMODE and ADCRESOLUTION determine how the offset values
are interpreted.
GX4002 2x2 14.025Gb/s Crosspoint Switch with Trace
Equalization and Output De-Emphasis
Data Sheet
55972 - 0
March 2012
39 of 74
Proprietary & Confidential