GX4002 Datasheet, PDF (32/74 Pages) Gennum Corporation – Dynamic on-chip power management control

Hysteresis control only affects the assert threshold. The LOS de-assert threshold is set by
CH1LOSTHNEG and CH1LOSTHPOS controls only. Figure 3-16 shows the hysteresis
characteristics and the impact of CH1LOSHYS[3:0]:
LOS Asserted
LOS O/P
LOS De-asserted
LOS Asserted
LOS O/P
LOS De-asserted
The LOS de-assert
threshold stays constant,
and only the LOS assert
threshold level varies with
the hysteresis setting,
CH1LOSHYS.
CH1LOSHYS 15 to 0
LOS Assert
Threshold
LOS De-assert
Threshold
Vin (mVppd)
CH1LOSHYS 15 to 0
LOS De-assert
Threshold
LOS Assert
Threshold
CH1LOSTHNEG
(for fixed Vin)
Hys (dB) = 20*log10(Vth_assert/Vth_deassert)
CH1LOSHYS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
15
Hys (dB)
0.1
0.3
0.7
1.1
1.4
1.8
2.1
2.5
3.0
3.4
3.9
4.4
4.8
5.4
6.7
Figure 3-16: Ch1 LOS Hysteresis
3.5.2.3 Manual LOS Assert
The on-chip LOS circuit can be bypassed, and LOS asserted, through the host interface.
This operation is initiated when CH1LOSSOFTASSERTEN is HIGH. The state of
CH1LOSSOFTASSERT then controls the LOS register CH1PLLLOS and external
indication through Ch1LOS.
Register Name
CH1_REG14
Register
Address^d
61
Parameter Name
CH1LOSSOFTASSERT
CH1LOSSOFTASSERTEN
Bit
Position
Access
6:6
RW
7:7
RW
Reset Value^b
0
0
Valid
Range^d
Function
When HIGH, asserts LOS.
0-1
CH1LOSSOFTASSERTEN must be HIGH to use
this bit.
0-1
When HIGH, LOS is controlled by
CH1LOSSOFTASSERT.
3.5.3 Loss Of Lock (LOL)
The channel 0 and channel 1 LOL status indicators are both available in registers as
shown below:
GX4002 2x2 14.025Gb/s Crosspoint Switch with Trace
Equalization and Output De-Emphasis
Data Sheet
55972 - 0
March 2012
32 of 74
Proprietary & Confidential