MB15F73UL Datasheet, PDF (4/18 Pages) Fujitsu Component Limited. – ASSP Dual Serial Input PLL Frequency Synthesizer

MB15F73UL
Dec. 2000
Edition 2.0
n BLOCK DIAGRAM
VCCIF GNDIF
(4) 6
5 (3)
VpIF
(6) 8
PSIF ₇
(5)
(1)
finIF ₃
XfinIF ₄
(2)
Intermittent
mode
control
(IF–PLL)
Prescaler
(IF–PLL)
8/9,16/17
OSCin 1
(19)
OR
(15)
finRF ₁₇
XfinRF ₁₆
(14)
Prescaler
(RF–PLL)
64/65,
128/129
PSRF 13
(11)
Intermittent
mode
control
(RF–PLL)
3-bit latch
LDS SWIF FCIF
7-bit latch
11-bit latch
Binary 7-bit
Binary 11-bit ^fpIF
swallow counter programmable
(IF–PLL)
counter(IF–PLL)
Phase
comp.
(IF–PLL)
Charge _Current
pump
(IF–PLL)
Switch
9 DoIF
(7)
2-bit latch
T1 T2
14-bit latch
Binary 14–bit pro-
grammable ref.
counter(IF–PLL)
1-bit latch
C/P
setting
current
frIF
T1 T2
2-bit latch
Binary 14-bit pro-
grammable ref.
counter(RF–PLL)
14-bit latch
C/P
setting
current
1-bit latch
frRF
Lock
Det.
(IF–PLL)
LDIF
AND
Lock
Det.
(RF–PLL)
Fast
lock
tuning
Selector
LD
frIF
frRF
fpIF
fpRF
10 LD/fout
(8)
LDS SWRF FCRF
3-bit latch
Binary 7-bit Binary 11-bit
swallow counter programmable
(RF–PLL)
counter(RF–PLL)
7-bit latch
11-bit latch
Phase Fast
comp. _lock
fpRF ^{(RF–PLL) tuning}
Charge _Current
pump
(RF–PLL)
Switch
11 DoRF
(9)
LE ₁₈
(16)
Schmitt
circuit
Latch selector
Data 19
(17)
Clock 20
(18)
Schmitt
circuit
Schmitt
circuit
CC
NN
12
23-bit shift
register
O -- TSSOP 20
( ) -- BCC 20
2 (20)
GND
(12)14
VccRF
15 (13)
GNDRF
12 (10)
VpRF
4