English
Language : 

MB39C011APFT-G-BND-ERE1 Datasheet, PDF (37/53 Pages) Cypress Semiconductor – 2 ch DC/DC Converter IC with Synchronous Rectification
MB39C011A
IL : Coil ripple current peak to peak value [A]
tr
: Turn-on time of High side FET [s]
tf
: Turn-off time of High side FET [s]
tr and tf are simply obtained by the following formula.
tr 
Qgd 4
5  Vgs (on)
tf 
Qgd 4
Vgs (on)
Qgd
: Quantity of charge between the gate and drain of High side FET [C]
Vgs(on)
: Absolute value of voltage difference between the gate and source of the High side FET at Qgd
[V]
Low side FET(N-ch MOS FET)
conduction loss
PLoSideFET  PRon  IOMAX2 (1 
VO
VIN
) Ron
PRon
IOMAX
VIN
VO
Ron
: Low side FET conduction loss [W]
: Maximum load current [A]
: Switching system power supply voltage [V]
: Output voltage [V]
: Low side FET ON resistance []
To select SW FETs that offer good conversion efficiency, the High side FET in particular should select such that the switching loss
is small (the power dissipated when the SW FET changes between ON and OFF). However, because there is generally a trade-off
between switching loss and conduction loss, this balance needs to be considered when making the selection.
As a guide, select FETs such that the total Qg of the SW FETs is as follows.
QgHiSideFET<
0.04
fosc
QgLoSideFET<
0.04
fosc
QgHiSideFET
QgLoSideFET
fosc
: Sum total electric charge of the CH1 and CH2 High side FETs [C]
: Sum total electric charge of the CH1 and CH2 Low side FETs [C]
: Oscillation frequency [Hz]
The SW FETs used with this device typically have a drive voltage of 4 V. Although there are FETs that support a drive voltage of
less than 4 V, low drive voltage FETs generally have a larger Qg even at equal value of Ron, the efficiency lowers. If a FET with
a low drive voltage is used, check that the low side FET does not self turn-on and that the dead-time is secured under the usage
conditions.
Document Number: 002-08369 Rev. *A
Page 37 of 53