MB39C011APFT-G-BND-ERE1 Datasheet, PDF (19/53 Pages) Cypress Semiconductor – 2 ch DC/DC Converter IC with Synchronous Rectification

MB39C011A
8.2.4 Operation When CTL is Turned On and Off
When CTL is turned on, the internal reference voltages VR1 and VB begin to rise. When VB exceeds the threshold voltage
(VTH) of UVLO (under voltage lockout protection circuit), UVLO is released, and the output drive circuits of each channel
are allowed to operate.When CTL is off, the output drive circuit of each channel is locked in the full off state and the CSCP1
and CSCP2 pins (pins 8 and 9) are fixed at the “L” level, even if the UVLO circuit is in the clear state. When the internal
reference voltages VR1 and VB begin to fall and when VB falls below the threshold voltage of the UVLO (under voltage
lockout protection circuit), the UVLO circuit is activated.
8.2.5 Independent Control Of Each Channel
The on/off state of each output voltage can be controlled independently by externally connecting the CSCP1 and CSCP2
pins (pins 8 and 9) to the drain pin of an NMOS transistor or to an NMOS open drain pin of a microcontroller, etc. When the
CSCP1 or CSCP2 pins (pins 8 and 9) is set to the “L” level by turning on the external NMOS transistor, the output voltage
turns off. Furthermore, when the external NMOS transistor is turned off, the soft-start function begins and the output voltage
turns on. Note that the internal operation of the IC continues when the output voltages are turned off using the CSCP1 and
CSCP2 pins (pins 8 and 9). Set the CTL pin (pin 13) to the “L” level to enter standby mode (the maximum power supply
current in standby mode is 10 A).
V
Vo1
MB39C011A
CSCP1
Vo2
CTL1
CS
CTL2
CTL
CSCP2
CS
CTL
CTL1
CTL2
CTL
t
Document Number: 002-08369 Rev. *A
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