English
Language : 

MB39C011APFT-G-BND-ERE1 Datasheet, PDF (13/53 Pages) Cypress Semiconductor – 2 ch DC/DC Converter IC with Synchronous Rectification
MB39C011A
8.2 Protection Function
8.2.1 Soft-start Circuit
To prevent rush currents when the IC is turned on, soft-start can be performed by connecting soft-start capacitors (CSCP1
and CSCP2) to the CSCP1 and CSCP2 pins (pins 8 and 9). When CTL pin (pin 13) is driven to the “H” level and the IC
begins operation (VCC ≥ UVLO threshold voltage), the external soft-start capacitors (CSCP1 and CSCP2) connected to the
CSCP1 and CSCP2 pins (pins 8 and 9) are charged by the charging current obtained from the following formula.
ICS 5.4 105  RT
ICS :Charge current [A]
RT :Timing resistance [k]
The error amplifier output (FB1 pin (pin 6), FB2 pin (pin 11)) is determined by comparing the voltages of the two non-inverted
input pins (whichever of the internal 1.0 V reference voltage and the CSCP1 and CSCP2 pins (pin 8 and pin 9) has the lowest
voltage) against the inverted input pin voltages (-INE1 pin (pin 7) voltage, -INE2 pin (pin 10) voltage). During the soft-start
period, FB1 and FB2 are determined by comparing the internal 1.0 V reference voltage against the voltages of the CSCP1
and CSCP2 pins (pins 8 and 9), and the DC/DC converter output voltages rise in proportion to voltages of the CSCP1 and
CSCP2 pins (pins 8 and 9) as the soft-start capacitors (CSCP1 and CSCP2) connected to the CSCP1 and CSCP2 pins (pins
8 and 9) are charged.
The soft-start time can be found from the following formula.
ts 0.019 CSCP RT
ts
:Soft-start time (time to output voltage 100) [s]
CSCP :Capacitance of CSCP pin [F]
RT :Timing resistance [k]
 1.3 V
 reference voltage 1.0 V
0V
CSCP pin voltage
Error Amp block -INE1 (-INE2) voltage
t
Soft start time, ts
Document Number: 002-08369 Rev. *A
Page 13 of 53