MB39C011APFT-G-BND-ERE1 Datasheet, PDF (18/53 Pages) Cypress Semiconductor – 2 ch DC/DC Converter IC with Synchronous Rectification

MB39C011A
Example where the output stops when the DC/DC converter is activated by the input power supply (example of output
stopped by SCP during startup)
Voltage [V]
Input power supply voltage V_IN (  CTL)
Output voltage setting
Output voltage (V_O)
(1) (2) (3)
Time [s]
In this case, the output can be prevented from being stopped by the SCP function during startup by
controlling the CTL pin independently.
Example of the DC/DC converter being started by the CTL pin
Voltage [V]
Output voltage setting
Input power supply voltage V_IN
CTL
Output voltage (V_O)
Time [s]
Furthermore, when turning off the input power supply, set the CTL pin to “L” before turning off the input power supply.
8.2.3 Under Voltage Lockout Protection Circuit (UVLO)
A drop in the power supply voltage may cause the IC to malfunction, resulting in breakdown or degradation of the system.
To prevent such malfunctions, the under voltage lockout protection circuit detects decreases in VB voltage due to the power
supply voltage, and locks, the OUT1-1 pin (pin 2) and OUT2-1 pin (pin 15) at the “H” level and the OUT1-2 pin (pin 3) and
OUT2-2 pin (pin 14) at the “L” level. The system is restored if the VB voltage rises above the threshold voltage of the under
voltage lockout protection circuit.
Function Table When the Protection Circuit (UVLO) is Operating
When the UVLO circuit is operating (the VB voltage is below the UVLO threshold voltage), the following pins are fixed at the
following logic levels.
OUT1-1
OUT1-2
OUT2-1
OUT2-2
CSCP1
CSCP2
H
L
H
L
L
L
Document Number: 002-08369 Rev. *A
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