MB39C313 Datasheet, PDF (20/52 Pages) Fujitsu Component Limited. – 4ch System Power Management IC for LCD Panel

MB39C313
4. Others
4.1) DLY1 / DLY2 delay time setting
With time delay (tdelay): DLY1 / DLY2 = open
Without time delay (tdelay): for each DLY1 / DLY2,
Cdelay =
5.5 μA × tdelay
VREF
Where:
tdelay = delay time,
Cdelay = Capacitor value connected to DLY-pin,
VREF = 1.213 V
4.2) VLOGIC : Buck converter
Output voltage setting :
( ) ^R1
VO1 = VREF × 1 +
R2
Where:
VREF = 1.213 V, R2 ≤ 1.2 kΩ
Feed-forward capacitance :
Cff1 =
1
2 × π × R1 × fz1
Where :
fz1 = a zero in transfer function
Soft start:
Internal preset
The soft start cycle start after EN1 is asserted and the duration is internally set to 1 ms.
4.3) VS: Boost converter
Output voltage setting:
( ) ^R3
VO2 = 1.146 × 1 +
R4
Feed-forward capacitance:
Cff2 =
1
2 × π × R3 × fz2
Where :
fz2 = a zero in transfer function
Soft start:
set by external capacitor connected to SS pin
(Soft start active when SS pin voltage < FB voltage)
GD pin:
GD goes L if FB > 1.03 V after delay time DLY2
GD gives Hi-Z if FB ≤ 1.03 V after delay time DLY2
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DS04–27267–1E