MB39C313 Datasheet, PDF (10/52 Pages) Fujitsu Component Limited. – 4ch System Power Management IC for LCD Panel

MB39C313
Power Up Sequencing (EN1, EN2, DLY1, DLY2)
EN1 and EN2 pin control the power up sequence of MB39C313. The timing of the sequencing events is
controlled by the capacitance on DLY1 and DLY2 pins. By pulling EN1 high, the Buck converter enables first.
Then, the Negative Charge Pump is enabled after some delay time, DLY1. Pulling EN2 high, the Boost
converter and Positive Charge Pump are enabled at the same time with some time delay, DLY2. If EN2 pin
is pulled high when the Buck converter is already operating, the time delay DLY2 starts at the EN2 rising
edge, Figure1. Setting such delay time can be particularly useful if EN2 is already connected to input voltage
(VIN). If EN2 is pulled high before the Buck converter is operating, the time delay DLY2 starts after the Buck
converter is fully on, Figure2.
• Figure 1. Power-On sequence with EN2 is always high
EN2
EN1
Vin
0V
DLY2
DLY1
VGH
Vs
Vlogic
VGL
Fall Time of each channel depends on
load current and feedback resistors.
Vin
GD
• Figure 2. Power-On sequence with EN1 and EN2 enabled separately
EN2
EN1
Vin
0V
GD
DLY2
DLY1
VGH
Vs
Vlogic
VGL
Fall Time of each channel
depends on load current
and feedback resistors.
Vin
10
DS04–27267–1E