MC68HC705C8ACFNE Datasheet, PDF (97/222 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.
Capture/Compare Timer
Timer I/O Registers
TOF — Timer Overflow Flag
The TOF bit is automatically set when the 16-bit counter rolls over
from $FFFF to $0000. Clear the TOF bit by reading the timer status
register with TOF set and then reading the low byte ($0019) of the
timer registers. Reset has no effect on TOF.
1 = Timer overflow
0 = No timer overflow
Bits 4–0 — Not used; these bits always read 0
8.4.3 Timer Registers
The read-only timer registers (TRH and TRL) shown in Figure 8-7
contain the current high and low bytes of the 16-bit counter. Reading
TRH before reading TRL causes TRL to be latched until TRL is read.
Reading TRL after reading the timer status register clears the timer
overflow flag bit (TOF). Writing to the timer registers has no effect.
Bit 7
6
5
4
3
2
1
Bit 0
Register Name and Address: Timer Register High — $0018
Read: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Write:
Reset:
Reset initializes TRH to $FF
Register Name and Address: Timer Register Low — $0019
Read: Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Reset initializes TRL to $FC
= Unimplemented
Figure 8-7. Timer Registers (TRH and TRL)
MC68HC705C8A — Rev. 3
MOTOROLA
Capture/Compare Timer
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Technical Data