MC68HC705C8ACFNE Datasheet, PDF (205/222 Pages) Freescale Semiconductor, Inc – Freescale Semiconductor, Inc.

Freescale Semiconductor, Inc.
MC68HSC705C8A
A.7 5.0-Volt High-Speed SPI Timing
Diagram
Number⁽¹⁾
Characteristic⁽²⁾
Operating frequency
Master
Slave
Cycle time
1
Master
Slave
Enable lead time
2
Master
Slave
Enable lag time
3
Master
Slave
Clock (SCK) high time
4
Master
Slave
Clock (SCK) low time
5
Master
Slave
Data setup time (inputs)
6
Master
Slave
Data hold time (inputs)
7
Master
Slave
8
Access time⁽⁴⁾
Slave
9
Disable time⁽⁵⁾
Slave
Data valid time
10
Master (before capture edge)
Slave (after enable edge)⁽⁶⁾
Symbol
Min
Max
Unit
f_OP(S)
dc
0.5
f_OP(S)
dc
4.0
t_CYC(M)
2.0
—
t_CYC(S)
250
—
t_Lead(M)
Note ⁽³⁾
—
t_Lead(S)
125
—
t_Lag(M)
Note⁽²⁾
—
t_Lag(S)
375
—
t_W(SCKH)M
170
—
t_W(SCKH)S
95
—
t_W(SCKL)M
170
—
t_W(SCKL)S
95
—
t_SU(M)
50
—
t_SU(S)
50
—
t_H(M)
50
—
t_H(S)
50
—
t_A
0
60
t_DIS
—
120
f_OP
MHz
t_CYC
ns
ns
ns
ns
ns
ns
ns
ns
ns
t_V(M)
t_V(S)
0.25
—
—
t_CYC(M)
120
ns
Continued
MC68HC705C8A — Rev. 3
MOTOROLA
MC68HSC705C8A
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Technical Data